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Publications associées (185)

Toward Predictable Performance in Software Packet-Processing Platforms

To become a credible alternative to specialized hardware, general-purpose networking needs to offer not only flexibility, but also predictable performance. Recent projects have demonstrated that general-purpose multicore hardware is capable of high-perform ...

2012

A Distributed Interleaving Scheme for Efficient Access to WideIO DRAM Memory

Giovanni De Micheli, Luca Benini, Ciprian Seiculescu

Achieving the main memory (DRAM) required bandwidth at ac- ceptable power levels for current and future applications is a ma- jor challenge for System-on-Chip designers for mobile platforms. Three dimensional (3D) integration and 3D stacked DRAM mem- ories ...

2012

Toward Predictable Performance in Software Packet-Processing Platforms

Mihai Dobrescu

Contention for shared resources—caches, memory controllers, buses, NICs—is assumed to be a hurdle in optimizing and predicting the performance of multi-core software systems, especially packet-processing systems, which make extensive use of these resources ...

2012

Design Methods and Tools for Application-Specific Predictable Networks-on-Chip

Ciprian Seiculescu

As the complexity of applications grows with each new generation, so does the demand for computation power. To satisfy the computation demands at manageable power levels, we see a shift in the design paradigm from single processor systems to Multiprocessor ...

EPFL2012

Clearing the Clouds: A Study of Emerging Scale-out Workloads on Modern Hardware

Anastasia Ailamaki, Babak Falsafi, Michael Ferdman, Mohammad Alisafaee, Yusuf Onur Koçberber, Stavros Volos, Ilknur Cansu Kaynak, Adrian Daniel Popescu, Al Mutaz Adileh

Emerging scale-out workloads require extensive amounts of computational resources. However, data centers using modern server hardware face physical constraints in space and power, limiting further expansion and calling for improvements in the computational ...

2012

OLTP on Hardware Islands

Anastasia Ailamaki, Miguel Sérgio De Oliveira Branco, Pinar Tözün, Ippokratis Pandis, Danica Porobic

Modern hardware is abundantly parallel and increasingly heterogeneous. The numerous processing cores have non-uniform access latencies to the main memory and to the processor caches, which causes variability in the communication costs. Unfortunately, datab ...

2012

Quantifying the Mismatch between Emerging Scale-Out Applications and Modern Processors

Anastasia Ailamaki, Babak Falsafi, Michael Ferdman, Mohammad Alisafaee, Yusuf Onur Koçberber, Stavros Volos, Ilknur Cansu Kaynak, Adrian Daniel Popescu, Al Mutaz Adileh, Dorde Jevdic

Association for Computing Machinery2012

NOC-Out: Microarchitecting a Scale-Out Processor

Babak Falsafi, Boris Robert Grot, Pejman Lotfi Kamran

Scale-out server workloads benefit from many-core processor organizations that enable high throughput thanks to abundant request-level parallelism. A key characteristic of these workloads is the large instruction footprint that exceeds the capacity of priv ...

2012

High-Performance RMA-Based Broadcast on the Intel SCC

André Schiper, Thomas Ropars, Omid Shahmirzadi, Darko Petrovic

Many-core chips with more than 1000 cores are expected by the end of the decade. To overcome scalability issues related to cache coherence at such a scale, one of the main research directions is to leverage the message-passing programming model. The Intel ...

2012

Self-Aligned 3D Chip Integration Technology and Through-Silicon Serial Data Transmission

Fengda Sun

The emerging three-dimensional (3D) integration technology is expected to lead to an industry paradigm shift due to its tremendous benefits. Intense research activities are going on about technology, simulation, design, and product prototypes. This thesis ...

EPFL2011

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