Concept

Logic optimization

Publications associées (121)

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Low noise, low power front end electronics for pixelized TFA sensors

Christophe Ballif, Matthieu Despeisse

Thin Film on ASIC (TFA) technology combines advantages of two commonly used pixel imaging detectors, namely, Monolithic Active Pixels (MAPs) and Hybrid Pixel detectors. Thanks to direct deposition of a hydrogenated amorphous silicon (a- Si:H) sensor lm on ...

2009

Arithmetic Optimization for Custom Instruction Set Synthesis

Paolo Ienne, Philip Brisk, Ajay Kumar Verma, Yi Zhu

One of the ways that custom instruction set extensions can improve over software execution is through the use of hardware structures that have been optimized at the arithmetic level. Arithmetic hardware, in many cases, can be partitioned into networks of f ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2009

Approximate BDD Minimization by Weighted A*

Reduced ordered Binary Decision Diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synthesis. The size of BDDs depends on a chosen variable ordering, i.e. the size may ...

Institute of Electrical and Electronics Engineers2009

Efficient Data Structures for Decision Diagrams

Nacereddine Ouaret

Dynamic Programming OPtimization (DPOP) is an algorithm proposed for solving distributed constraint optimization problems. In this algorithm, Hypercubes are used as the format of the messages exchanged between the agents. Then, Hybrid-DPOP (H-DPOP), a hybr ...

2008

Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories

Giovanni De Micheli, Mihai Adrian Ionescu, David Atienza Alonso, Didier Bouvet, Kirsten Emilie Moselund, Yusuf Leblebici, Mohamed Haykel Ben Jamaa

The fabrication of crossbar memories with sublithographic features is expected to be feasible within several emerging technologies; in all of them, the nanowire (NW) decoder is a critical part since it bridges the sublithographic wires to the outer circuit ...

2008

Exploiting Binary Abstractions in Deciphering Gene Interactions

Giovanni De Micheli, Abhishek Garg

We consider computationally reconstructing gene regulatory networks on top of the binary abstraction of gene expression state information. Unlike previous Boolean network approaches, the proposed method does not handle noisy gene expression values directly ...

2006

Dispositif électronique à affichage électro-optique commandé par des circuits logiques programmables

Daniel Mange, Christof Teuscher

NOVELTY - The electronic display (2) includes a number of cells (12) whose upper faces form a display surface, each cell has an electro-optic display unit (6) with inputs (14) for data to be displayed. A programmable logic circuit (20) is associated with f ...

2001

Optically programmable gate array

Demetri Psaltis

The Optically Programmable Gate Array (OPGA), an optical version of a conventional FPGA, benefits from a direct parallel interface between an optical memory and a logic circuit. The OPGA utilizes a holographic memory accessed by an array of VCSELs to progr ...

Spie-Int Soc Optical Engineering, Po Box 10, Bellingham, Wa 98227-0010 Usa2000

Optical memory for computing and information processing

Demetri Psaltis, Wei Liu

The high data transfer rate achievable in page-oriented optical memories demands for parallel interfaces to logic circuits able to process efficiently the data. The Optically Programmable Gate Array, an enhanced version of a conventional FPGA, utilizes a h ...

Spie-Int Soc Optical Engineering, Po Box 10, Bellingham, Wa 98227-0010 Usa1999

Synthesis and Optimization of Digital Circuits

Giovanni De Micheli

This graduate textbook in computer engineering offers a modern, up-to-date look at computer aided design of VLSI circuits at the functional and logic level by addressing an interesting topic in CAD for digital circuits: design synthesis of detailed specifi ...

McGraw Hill1994