Concept

Architecture 32 bits

Publications associées (32)

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Fast Software AES Encryption

Joppe Willem Bos, Dag Arne Osvik, Deian Stefan

This paper presents new software speed records for AES-128 encryption for architectures at both ends of the performance spectrum. On the one side we target the low-end 8-bit AVR rnicrocontrollers and 32-bit ARM microprocessors, while on the other side of t ...

Springer-Verlag New York, Ms Ingrid Cunningham, 175 Fifth Ave, New York, Ny 10010 Usa2010

High Frame-rate TCSPC-FLIM Using a Novel SPAD-based Image Sensor

Edoardo Charbon, Marek Gersbach, Matthew Fishburn

Imaging techniques based on time-correlated single photon counting (TCSPC), such as fluorescence lifetime imaging microscopy (FLIM), rely on fast single-photon detectors as well as timing electronics in the form of time-to-digital or time-to-analog convert ...

Spie-Int Soc Optical Engineering, Po Box 10, Bellingham, Wa 98227-0010 Usa2010

Bit Precision Analysis for Compressed Sensing

Mohammad Amin Shokrollahi, Mahdi Cheraghchi Bashi Astaneh

This paper studies the stability of some reconstruction algorithms for compressed sensing in terms of the bit precision. Considering the fact that practical digital systems deal with discretized signals, we motivate the importance of the total number of ac ...

2009

Data-flow transformations to maximize the use of carry-save representation in arithmetic circuits

Paolo Ienne, Philip Brisk, Ajay Kumar Verma

The increasing importance,of datapath circuits in complex systems-on-chip calls for special arithmetic optimizations. The goal is to automatically achieve the handcrafted results which escape classic logic optimizations. Some work has been done in the rece ...

2008

Multi-bit error tolerant caches using two-dimensional error coding

Babak Falsafi

In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses, soft and hard errors in the memory system will increase and single error ev ...

2007

Dynamic Texture on Fixed-Point Architectures

Sabine Süsstrunk, Luciano Sbaiz, Roberto Costantini

Dynamic textures are sequences of images showing temporal regularity; they can be found in videos representing smoke, flames, flowing water, or moving grass, for instance. Recently, one method based on linear dynamic system theory was proposed to synthesiz ...

2006

Reconfigurable Coprocessor for Media Streaming

Sébastien Bilavarn

The development of more processing demanding video standards on one hand and the popularity of mobile devices such as digital cameras or wireless videophones on the other hand introduce a need of optimization at the processor level. Reconfigurable systems ...

SPIE2004

High resolution miniature rotary microactuator

Jean-Marc Breguet, Walter Driesen

For the development of high precision mobile microrobots with a size of about one cm3, capable of micromanipulation tasks, small and precise actuators have to be developed in order to provide the microrobot and its manipulation tools with the required degr ...

2004

128 channel PCI-based data acquisition system for MDSplus

Basil Duval, Xavier Llobet

With the increasing demand for analogue channel acquisition on the TCV tokamak, a new PCI based acquisition has been specified, designed, built and installed into our MDSplus acquisition environment. The design criteria were to not only improve the cost/ch ...

2002

Decorrelated Fast Cipher: an AES candidate well suited for low cost smart cards applications

Serge Vaudenay

In response to the call for candidates issued by the National Institute for Standards and Technologies (the Advanced Encryption Standard project) the Ecole Normale Superieure proposed a candidate called DFC (Decorrelated Fast Cipher). DFC is based on a dec ...

2000