Publications associées à Hardware virtualization

Hardware And Software For Reproducible Research In Audio Array Signal Processing

Paul Hurley, Eric Bezzam, Sepand Kashani, René Beuchat, Matthieu Martin Jean-André Simeoni, Robin Scheibler, Hanjie Pan, Corentin Ferry, Basile Gérard Pierre Bruneau

In our demo, we present two hardware platforms for prototyping audio array signal processing. Pyramic is a 48-channel microphone array fitted on an FPGA and Compact Six is a portable microphone array with six microphones, closer to the technical constraint ...

Ieee2017

Comparison of Polar Decoders with Existing Low-Density Parity-Check and Turbo Decoders

Andreas Peter Burg, Alexios Konstantinos Balatsoukas Stimming, Pascal Giard

Polar codes are a recently proposed family of provably capacity-achieving error-correction codes that received a lot of attention. While their theoretical properties render them interesting, their practicality compared to other types of codes has not been ...

Ieee2017

The IX Operating System: Combining Low Latency, High Throughput, and Efficiency in a Protected Dataplan

Edouard Bugnion, Christos Kozyrakis, Georgios Prekas, Mia Primorac, Ana Klimovic

The conventional wisdom is that aggressive networking requirements, such as high packet rates for small messages and μs-scale tail latency, are best addressed outside the kernel, in a user-level networking stack. We present ix, a dataplane operating system ...

Association for Computing Machinery2016

Designing a Virtual Runtime for FPGA Accelerators in the Cloud

Paolo Ienne, Mikhail Asiatici, Nithin George

FPGAs can provide high performance and energy efficiency to many applications; therefore, they are attractive computing platforms in a cloud environment. However, FPGA application development requires extensive hardware design knowledge which significantly ...

Ieee2016

VNToR: Network Virtualization at the Top-of-Rack Switch

Edouard Bugnion, Georgios Ioannidis, Sam David Whitlock, Jonas Fietz

Cloud providers typically implement abstractions for net- work virtualization on the server, within the operating sys- tem that hosts the tenant virtual machines or containers. Despite being flexible and convenient, this approach has funda- mental problems ...

2016

Characterization of the Impact of Hardware Islands on OLTP

Anastasia Ailamaki, Miguel Sérgio De Oliveira Branco, Pinar Tözün, Ippokratis Pandis, Danica Porobic

Modern hardware is abundantly parallel and increasingly heterogeneous. The numerous processing cores have non-uniform access latencies to the main memory and processor caches, which causes variability in the communication costs. Unfortunately, database sys ...

Springer Verlag2016

Performance Estimation Based Multicriteria Partitioning Approach for Dynamic Dataflow Programs

Marco Mattavelli, Nicolas Zufferey, Malgorzata Maria Michalska

The problem of partitioning a dataflow program onto a target architecture is a difficult challenge for any application design. In general, since the problem is NP-complete, it consists of looking for high quality solutions in terms of maximizing the achiev ...

Hindawi Limited2016

A Bio-Inspired Reconfigurable Architecture for Local Binary Descriptors

Selman Ergünay, Yusuf Leblebici

Limited resources of embedded devices and increased real time constraints have raised interest to the binary description methods over the floating-point ones such as SIFT and SURF in computer vision applications. Although many software applications of the ...

Ieee2016

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Hardware virtualization

Hardware And Software For Reproducible Research In Audio Array Signal Processing

Comparison of Polar Decoders with Existing Low-Density Parity-Check and Turbo Decoders

A Scalable and Secure System Architecture for Smart Buildings

The IX Operating System: Combining Low Latency, High Throughput, and Efficiency in a Protected Dataplan

Designing a Virtual Runtime for FPGA Accelerators in the Cloud

VNToR: Network Virtualization at the Top-of-Rack Switch

Characterization of the Impact of Hardware Islands on OLTP

Performance Estimation Based Multicriteria Partitioning Approach for Dynamic Dataflow Programs

A Bio-Inspired Reconfigurable Architecture for Local Binary Descriptors

Scaling Up Concurrent Analytical Workloads on Multi-Core Servers

Graph Chatbot

Chattez avec Graph Search

Hardware And Software For Reproducible Research In Audio Array Signal Processing

The IX Operating System: Combining Low Latency, High Throughput, and Efficiency in a Protected Dataplan

Designing a Virtual Runtime for FPGA Accelerators in the Cloud

VNToR: Network Virtualization at the Top-of-Rack Switch

Performance Estimation Based Multicriteria Partitioning Approach for Dynamic Dataflow Programs

Scaling Up Concurrent Analytical Workloads on Multi-Core Servers

A Bio-Inspired Reconfigurable Architecture for Local Binary Descriptors

Comparison of Polar Decoders with Existing Low-Density Parity-Check and Turbo Decoders

A Scalable and Secure System Architecture for Smart Buildings

Characterization of the Impact of Hardware Islands on OLTP