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In this paper, a baseband ASIC which supports receive diversity and soft-output Viterbi equalization for enhanced 2G networks is presented. It includes a transmitter and receiver with a symbol detector and a decoder with a dedicated incremental redundancy ...
Considerable progress has been made in the last decade in implantable bioelectronic neurosystems. Yet most neural implants are used in acute and tethered experimental conditions. Here, we present a preliminary prototype of a multichannel system for simulta ...
This paper presents the implementation of the 1.2 mm2 HSDPA turbo decoder ASIC in 0.13 mum CMOS achieves a measured maximum frequency of 246 MHz, which translates to a maximum throughput of 20.2 Mb/s at 5.5 iterations. The peak throughput of 10.8 Mb/s requ ...
Modern wireless communication systems require efficient channel equalizer implementations. This paper explores the design space of reduced-state sequence estimation (RSSE). We show how the concept of pre-computation can be applied to greatly reduce computa ...
