A new circuit style is proposed to tune the delay, subthreshold leakage (ISUB), and gate leakage (IG) of high fan-in multiplexer circuits, such as the FPGA Look-Up Table (LUT) and Switch-Box (SB), without increasing the Gate Induced Drain Leakage (GIDL) cu ...
Technology scaling improves the energy, performance, and area of the digital circuits. With further scaling into sub-45nm regime, we are moving toward very low supply (VDD) and threshold voltages (VT), smaller VDD/VT ratio, high leakage current, and large ...
