Michele De Marchi

Cette personne n’est plus à l’EPFL

Publications associées (16)

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Towards Structured ASICs Using Polarity-Tunable SiNW Transistors, invited

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Michele De Marchi, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Shashi Kanth Bobba

In addition to scaling semiconductor devices down to their physical limit, novel devices show enhanced functionality compared to conventional CMOS. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., they show n- and p-type charact ...

2013

Vertically Stacked Double Gate Nanowires FETs with Controllable Polarity: From Devices to Regular ASICs

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Michele De Marchi, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Shashi Kanth Bobba

Vertically stacked nanowire FETs (NWFETs) with gate-all-around structure are the natural and most advanced extension of FinFETs. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., the device shows n- and p-type characteristics sim ...

2013

Process/Design Co-optimization of Regular Logic Tiles for Double-Gate Silicon Nanowire Transistors

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang, Shashi Kanth Bobba, Michele De Marchi

Ambipolar transistors with on-line configurability to n-type and p-type polarity are desirable for future integrated circuits. Regular logic tiles have been recognized as an efficient layout fabric for ambipolar devices. In this work, we present a process/ ...

2012

Physical Synthesis onto Sea-of-Tiles with Double-Gate Silicon Nanowire Transistors

Giovanni De Micheli, Yusuf Leblebici, Shashi Kanth Bobba, Michele De Marchi

We have designed and fabricated double-gate ambipolar field-effect transistors, which exhibit p-type and n-type characteristics by controlling the polarity of the second gate. In this work, we present an approach for designing an efficient regular layout, ...

Ieee2012

Polarity Control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang, Michele De Marchi

We fabricated and characterized ambipolar Silicon Nanowire (SiNW) FET transistors featuring two independent Gate-All-Around (GAA) electrodes and vertically stacked SiNW channels. One of the gate electrodes is exploited to dynamically select the polarity of ...

2012

Alternative Design Methodologies for the Next Generation Logic Switch (invited paper)

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Michele De Marchi

Next generation logic switch devices are ex- pected to rely on radically new technologies mainly due to the increasing difficulties and limitations of state-of-the-art CMOS switches, which, in turn, will also require innovative design methodologies that ar ...

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