Cong Ding, Uisub Shin, Mahsa Shoaran
Growing evidence suggests that phase-locked deep brain stimulation (DBS) can effectively regulate abnormal brain connectivity in neurological and psychiatric disorders. This letter therefore presents a low-power SoC with both neural connectivity extraction and phase-locked DBS capabilities. A 16-channel low-noise analog front-end (AFE) records local field potentials (LFPs) from multiple brain regions with precise gain matching. A novel low-complexity phase estimator and neural connectivity processor subsequently enable energy-efficient, yet accurate measurement of the instantaneous phase and cross-regional synchrony measures. Through a flexible combination of neural biomarkers, such as phase synchrony and spectral energy, a four-channel charge-balanced neurostimulator is triggered to treat various pathological brain con-ditions. Fabricated in 65-nm CMOS, the SoC occupies a silicon area of 2.24 mm(2) and consumes 60 mu W, achieving over 60% power sav -ing in neural connectivity extraction compared to the state-of-the-art. Extensive in-vivo measurements demonstrate multichannel LFP record-ing, real-time extraction of phase and neural connectivity measures, and phase-locked stimulation in rats.
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2023
