This article proposes a new two-wired amplifying active electrode (AE), presenting a high input impedance and a high common-mode rejection ratio (CMRR). In the proposed structure, the input impedance and the CMRR of the system are considerably increased by ...
This paper presents a new power-efficient and high-speed voltage level shifter. In the proposed structure, the existing contentions at the internal nodes are reduced using auxiliary transistors and feedback networks, leading to a significant reduction in t ...
The analysis of the operation of non-linear circuits such as voltage level shifters and latched comparators and therefore prediction of their propagation delay and power consumption are challenging. This is because the operating points of the employed non- ...
Institute of Electrical and Electronics Engineers (IEEE)2025
In this paper, the frequency behavior and stability of current recording systems employing continuous-time integrator-differentiator transimpedance amplifiers (TIAs) are analyzed. The proposed comprehensive analysis provides designers helpful design rules ...
Institute of Electrical and Electronics Engineers (IEEE)2025
This brief proposes a low-voltage, high-precision, and high-dynamic-range current-mode analog winner-take-all (WTA) circuit. The proposed structure employs a new high-gain stage as a feedback network between the input node of each cell and the common node ...
A new architecture for successive-approximation register analog-to-digital converters (SAR ADC) using generalized non-binary search algorithm is proposed to reduce the complexity and power consumption of the digital circuitry. The proposed architecture is ...
