Publications de Andrea Costamagna

Area-Oriented Resubstitution For Networks of Look-Up Tables

Giovanni De Micheli, Andrea Costamagna, Alessandro Tempia Calvino

This paper addresses the challenge of reducing the number of nodes in Look-Up Table (LUT) networks with two significant applications. First, Field-Programmable Gate Arrays (FPGAs) can be modelled as networks of LUTs, and minimizing the node count is impera ...

2025

Area-Oriented Optimization After Standard-Cell Mapping

Giovanni De Micheli, Andrea Costamagna, Alessandro Tempia Calvino

We address the problem of minimizing the area of circuits mapped to a technology library, with or without delay constraints. While traditional methods optimize first a technology-independent representation and then perform technology mapping to a library, ...

Association for Computing Machinery2025

SPFD-Based Delay Resynthesis

Giovanni De Micheli, Andrea Costamagna

We propose novel algorithms for post-mapping delay optimization, referred to as delay resynthesis. The state-of-the-art approach optimizes delay by rewriting with optimal local substructures. However, it is limited to local transformations, does not exploi ...

IEEE2025

Symmetry-Based Synthesis for Interpretable Boolean Evaluation

Giovanni De Micheli, Andrea Costamagna

Efficient evaluation of Boolean functions is a fundamental problem in computer science, impacting computational complexity and hardware performance. A natural way to evaluate Boolean functions is using circuits composed of two-input operators. However, syn ...

IEEE Computer Society2025

Lazy Man’s Resynthesis For Glitching-Aware Power Minimization

Giovanni De Micheli, Andrea Costamagna

This paper presents a novel resynthesis engine for minimizing the dynamic power of digital circuits. Traditional logic synthesis methods primarily focus on zero-delay toggles—logic state changes occurring between the start and end of a clock cycle. In cont ...

Institute of Electrical and Electronics Engineers2025

An Enhanced Resubstitution Algorithm for Area-Oriented Logic Optimization

Giovanni De Micheli, Andrea Costamagna

Logic synthesis is an ensemble of algorithms that optimizes digital circuit representations and maps them to a chosen technology. Minimizing the number of gates is essential to reduce area occupation and power consumption. As the problem is intractable, he ...

2024

The Combinational-Complexity Game For Symmetric Functions

Giovanni De Micheli, Andrea Costamagna

2023

Accuracy recovery: A decomposition procedure for the synthesis of partially-specified Boolean functions

Giovanni De Micheli, Andrea Costamagna

Logic Synthesis From Partial Specifications (LSFPS) is the problem of finding the hardware implementation of a Boolean function from a partial knowledge of its care set. The elements missing from the specifications are named don't knows. The exact solution ...

ELSEVIER2023

Logic Synthesis From Incomplete Specifications Using Disjoint Support Decomposition

Giovanni De Micheli, Andrea Costamagna

Approximate logic synthesis is an emerging field that tolerates errors in the synthesized logic circuits for better optimization quality. Indeed, in many computing problems, the requirement of preserving the exact functionality either results in unnecessar ...

IEEE2022