Publications associées à Near-optimal Deployment of Dataflow Applications on Many-core Platforms with Real-time Guarantees

EdgeAI-Aware Design of In-Memory Computing Architectures

Driven by the demand for real-time processing and the need to minimize latency in AI algorithms, edge computing has experienced remarkable progress. Decision-making AI applications stand out for their heavy reliance on data-centric operations, predominantl ...

EPFL2024

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

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Today's continued increase in demand for processing power, despite the slowdown of Moore's law, has led to an increase in processor count, which has resulted in energy consumption and distribution problems. To address this, there is a growing trend toward ...

EPFL2023

Chaosity: Understanding Contemporary NUMA-architectures

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Modern hardware is increasingly complex, requiring increasing effort to understand in order to carefully engineer systems for optimal performance and effective utilization. Moreover, established design principles and assumptions are not portable to modern ...

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Efficient Concurrent Analytical Query Processing using Data and Workload-conscious Sharing

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Analytical workloads are evolving as the number of users surges and applications that submit queries in batches become popular. However, traditional analytical databases that optimize-then-execute each query individually struggle to provide timely response ...

EPFL2023

From C/C plus plus Code to High-Performance Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic

High-level synthesis (HLS) tools typically generate statically scheduled datapaths. Static scheduling implies that the resulting circuits have a hard time exploiting parallelism in code with potential memory dependences, with control dependences, or where ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

SIMD Parallel Execution on GPU from High-Level Dataflow Synthesis

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Writing and optimizing application software for heterogeneous platforms including GPU units is a very difficult task that requires designer efforts and resources to consider several key elements to obtain good performance. Dataflow programming has shown to ...

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Analysis of Dampers in Time-Sensitive Networks With Non-Ideal Clocks

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Dampers are devices that reduce delay jitter in the context of time-sensitive networks, by delaying packets for the amount written in packet headers. Jitter reduction is required by some real-time applications; beyond this, dampers have the potential to so ...

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Streaming and Matching Problems with Submodular Functions

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Submodular functions are a widely studied topic in theoretical computer science. They have found several applications both theoretical and practical in the fields of economics, combinatorial optimization and machine learning. More recently, there have also ...

EPFL2022

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis

Paolo Ienne, Lana Josipovic

A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence o ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Performance Estimation of High-Level Dataflow Program on Heterogeneous Platforms by Dynamic Network Execution

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

The performance of programs executed on heterogeneous parallel platforms largely depends on the design choices regarding how to partition the processing on the various different processing units. In other words, it depends on the assumptions and parameters ...

MDPI2022