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A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication

Publications associées (41)

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A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication

Giovanni De Micheli, David Atienza Alonso

Network-on-Chip (NoC) has emerged as a very promising paradigm for designing scalable communication architecture for Systems-on-Chips (SoCs). However, NoCs designed to fulfill the bandwidth requirements between the cores of an SoC for a certain set of runn ...

Springer2010

Run-time Mapping of Applications on FPGA-based Reconfigurable Systems

David Atienza Alonso, Ivan Beretta

The role of Field-Programmable Gate Arrays (FPGAs) in System-on-Chip (SoC) design considerably increased in the last few years. Their established importance is due to the large amount of hardware resources they offer, as well as to their increasing perform ...

IEEE Press2010

Emulation-based transient thermal modeling of 2D/3D systems-on-chip with active cooling

David Atienza Alonso, Pablo Garcia del Valle

State-of-the-art devices in the consumer electronics market are relying more and more on Multi-Processor Systems-On-Chip (MPSoCs) as an efficient solution to meet their multiple design constrains, such as low cost, low power consumption, high performance a ...

Elsevier2010

Real-Time Embedded Emotional Controller

Arash Arami

Recent studies show that emotion is a mechanism for fast decision-making in human and other animals. Mathematical models have been developed for describing emotion in mammals. These models, similar to other bio-inspired models, must be implemented in embed ...

Springer Verlag2010

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Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhanced support for dynamic and partial reconfigurability. Design automation suppor ...

IEEE Press2009

Thermal Balancing Policy for Multiprocessor Stream Computing Platforms

Giovanni De Micheli, David Atienza Alonso, Luca Benini

Die-temperature control to avoid hotspots is increasingly critical in Multiprocessor System-on-Chip (MPSoCs) for stream computing. In this context, thermal balancing policies based on task migration are a promising approach to re-distribute power dissipati ...

2009

A Method for Calculating Hard QoS Guarantees for Networks-on-Chip

Giovanni De Micheli, Luca Benini, Srinivasan Murali, Federico Angiolini, Hamid Sarbazi-Azad, Dara Rahmati

Many Networks-on-Chip (NoC) applications exhibit one or more critical traffic flows that require hard Quality of Service (QoS). Guaranteeing bandwidth and latency for such real time flows is crucial. In this paper, we present novel methods to efficiently c ...

2009

Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have focused on adaptive post-fabrication tuning approaches to mitigate this prob ...

2009

We compare the performance of ABR and UBR for providing high-speed network interconnection services for TCP traffic. We test the hypothesis that UBR with adequate buffering in the ATM switches results in better overall goodput for TCP traffic than explicit ...

1999

A comparison of ABR and UBR to support TCP traffic

Jean-Yves Le Boudec

This paper compares the performance of ABR and UBR for providing high-speed network interconnection services for TCP traffic. We test the hypothesis that UBR with adequate buffering in the ATM switches results in better overall goodput for TCP traffic than ...

1997