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Comparing the effectiveness of fine-grain memory caching against page migration/replication in reducing traffic in DSM clusters

Publications associées (101)

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Stretching Transactional Memory

Rachid Guerraoui, Michal Kapalka, Aleksandar Dragojevic

Transactional memory (TM) is an appealing abstraction for programming multi-core systems. Potential target applications for TM, such as business software and video games, are likely to involve complex data structures and large transactions, requiring speci ...

2008

A profiling framework for high level design space exploration for memory and system architectures

In 1971, the first microprocessor produced in mass production had 2300 transistor and was able to compute 60'000 operations per second at 740 kHz. Nowadays, even a common gaming console uses a central unit including 243 millions of transistors running at 4 ...

EPFL2007

Spatial Memory Streaming

Anastasia Ailamaki, Babak Falsafi

Prior research indicates that there is much spatial variation in applications' memory access patterns. Modern memory systems, however, use small fixed-size cache blocks and as such cannot exploit the variation. Increasing the block size would not only proh ...

2006

Routing Aware Switch Hardware Customization for Networks on Chips

Giovanni De Micheli, Srinivasan Murali

Networks on Chip (NoC) has been proposed as a scalable and reusable solution for interconnecting the ever- growing number of processor/memory cores on a single silicon die. As the hardware complexity of a NoC is significant, methods for designing a NoC wit ...

2006

Store-Ordered Streaming of Shared Memory

Anastasia Ailamaki, Babak Falsafi

Coherence misses in shared-memory multiprocessors account for a substantial fraction of execution time in many important scientific and commercial workloads. Memory streaming provides a promising solution to the coherence miss bottleneck because it improve ...

2005

A Portable Kernel Abstraction for Low-Overhead Ephemeral Mapping Management

Willy Zwaenepoel

Modern operating systems create ephemeral virtual-to-physical mappings for a variety of purposes, ranging from the implementation of interprocess communication to the implementation of process tracing and debugging. With succeeding generations of processor ...

2005

A case for asymmetric-cell cache memories

Babak Falsafi

In this paper, we make the case for building high-performance asymmetric-cell caches (ACCs) that employ recently-proposed asymmetric SRAMs to reduce leakage proportionally to the number of resident zero bits. Because ACCs target memory value content (indep ...

2005

Diagnosing Performance Overheads in the Xen Virtual Machine Environment

Willy Zwaenepoel, Aravind Menon

Virtual Machine (VM) environments (e.g., VMware and Xen) are experiencing a resurgence of interest for diverse uses including server consolidation and shared hosting. An application's performance in a virtual machine environ- ment can differ markedly from ...

2005

Processeur à haut degré de parallélisme basé sur des composantes sérielles

Ralph Hoffmann

Nowaday, the world of processors is still dominated by the RISC architectures, which foundations have been laid down in the 70's. The RISC concept may be summarized by one word : simplicity. With this concept, much simpler architectures are born, in partic ...

EPFL2004

Dynamically Trading Frequency for Complexity in a GALS Microprocessor

Microprocessors are traditionally designed to provide “best overall” performance across a wide range of applications and operating environments. Several groups have proposed hardware techniques that save energy by “downsizing” hardware resources that are u ...

2004