Retention in nonvolatile silicon transistors with an organic ferroelectric gate

A silicone-based one-transistor nonvolatile memory cell has been implemented by integration of a ferroelectric polymer gate on a standard n- type metal oxide semiconductor field effect transistor. The polarization reversal in the gate results in a stable and reproducible memory effect changing the source-drain current by a factor 102–103, with the retention exceeding 2–3 days. Analysis of the drain current relaxation and time- resolved study of the spontaneous polarization via piezoforce scanning probe microscopy indicates that the retention loss is controlled by the interface- adjacent charge injection rather than the polarization instability. A semiquantitative model describes the time-dependent retention loss characterized by an exponential decay of the open state current of the transistor. The unique combination of properties of the ferroelectric copolymer of vinylidene fluoride and trifluoroethylene, including an adequate spontaneous polarization and low dielectric constant as well as rather benign processing demands, makes this material a promising candidate for memories fully compatible with silicon technology.

Polarisation reversal in ferroelectric PVDF and PZT films

Roman Gysel

Ferroelectrics are characterised by a spontaneous polarisation that can be reversed by an external electric field. The stability of the polarisation states and the possibility for controlled switching between the states render ferroelectric materials very attractive for memory applications, in which polarisation states are associated to a binary information "0" or "1". Fast, dense, and reliable data storage has gained enormous importance in our information technology based society. In this context, the fundamental physics of ferroelectric materials attracted great interest with the ultimate goal of reaching memory elements with shortest access times and highest densities. Two model systems of ferroelectric materials were studied in this thesis on the polarisation reversal: an inorganic, classical perovskite and an organic polymer. Despite the fundamental structural differences between lead zirconate titanate [Pb(Zr,Ti)O3] and the investigated polyvinylidene fluoride-trifluoroethylene [P(VDF-TrFE)] copolymer, the switching kinetics in these materials can be described by a similar formalism. Our approach of a combination of macroscopic and microscopic techniques enables an insight into the mechanisms of the polarisation reversal and allows for a better understanding of macroscopic effects governed by mechanisms occurring on the nanoscale. The experimental techniques developed for the ferroelectric capacitor structures have been successfully applied for studying a first hybrid PVDF/silicon ferroelectric transistor for non-volatile information storage. The major accomplishments of this thesis are the following: We demonstrated for the first time a piezoelectric scanning probe study on the cross section of ferroelectric thin films. In combination with switching pulses, this allowed us to directly image the polarisation reversal in ferroelectric films quasi-dynamically. The utility of cross-sectional domain imaging as a powerful tool for the study of the polarisation reversal in ferroelectrics has been corroborated. The apparent contradiction between observations interpreted as a fast sideways growth and the classical scenario of a fast forward growth could be explained by an oblique polarisation direction with respect to the film plane. A surface-stimulated nucleation of reverse domains, with preference on the electrode with a negative potential was observed. It was interpreted in terms of a built-in field due to a depletion layer at the ferroelectric-electrode interface. A combination of microscopic and macroscopic methods used for the first time in organic ferroelectric thin films enabled a better insight into polarisation reversal of the copolymer of vinylidene fluoride and trifluoroethylene P(VDF-TrFE). The polarisation reversal was found to be impeded by a restricted domain growth. This limits the applicability of the conventional Kolmogorov-Avrami model as well as the nucleation-limited switching model with a broad distribution of nucleation times. We demonstrated that an interface-adjacent passive layer may impact on the switching properties and gives rise to a retardation of the polarisation reversal. Furthermore, an extraordinary dielectric constant increase was observed in the films with a passive layer due to an additional domain wall contribution. We fabricated for the first time a hybrid silicon/ferroelectric polymer ferroelectric single transistor memory element with non-volatile operation. The observed difference of the polarisation reversal kinetics of the ferroelectric in the simple capacitor and in the transistor structure was explained by the gate oxide buffer layer in the transistor. Our previously developed tools and approaches enabled a better understanding of retention loss mechanism. A semi-quantitative retention model was suggested that explains the observed exponential retention loss. The investigation of relevant fundamental aspects of ferroelectric materials and the development of novel characterisation techniques in this work can be of interest for further development of non-volatile memory devices.

EPFL2008

Ferroelectric gate on AlGaN/GaN heterostructures

Lisa Malin

The capability of switching the spontaneous polarisation under an applied electric field in ferroelectric materials can be exploited for the use in low power, non-volatile, re-writable memory devices. Currently available commercially is ferroelectric random access memory, FeRAM, which allows for high speed, low voltage and greater write-erase endurance compared to its two main competitors, Flash and EEPROM, when using the one transistor – one capacitor configuration. However, it is desired to further optimise the configuration in order to obtain better densification, faster access time and better reliability. One way to do such is to pass from the ferroelectric capacitors and develop ferroelectric field effect transistors. Exploiting the phenomenon of ferroelectricity and integrating ferroelectrics with the semiconductor technology has not been simple. The FeFET has been demonstrated using a silicon-based transistor, however commercial devices are not available. Challenges arise mainly due to the high temperature deposition of perovskite ferroelectrics causing the degradation of the ferroelectric/semiconductor interface due to inter-diffusion. Acquiring long term retention of the transistor behavior has also been problematic due to phenomenons such as charge injection and depolarisation. In this thesis a new approach to the problem of semiconductor devices with a ferroelectric gate is explored. Instead of using a silicon-based device, semiconductor heterostructures are investigated. Combining the high mobility channel existing in semiconductor heterostructures, with the non-volatile switching of the polarisation in the ferroelectric gate can pave the way to novel future devices. The AlGaN/GaN semiconductor heterostructure was chosen for two main reasons. The first is a two dimensional electron gas, 2DEG, located at the AlGaN/GaN interface which possesses better transport properties than a single layered semiconductor. Secondly, GaN and its alloys are known to have large chemical and temperature stability making them ideal to withstand the high temperature deposition process of perovskite ferroelectrics. The deposition of two ferroelectric layers onto the AlGaN heterostructure were investigated. Lead zirconium titanate, PZT, a traditional perovskite ferroelectric deposited at high temperature, was chosen for its high remanent polarisation and low coercive field. An alternative ferroelectric gate, the co-polymer poly(vinylidene fluoride/trifluoroethylene), P(VDF/TrFE)(70:30) was deposited and of interest due its low crystallisation temperature and low dielectric constant. Its remanent polarisation is smaller and coercive field larger than that of PZT, but were determined sufficient to observe the depletion effect in the two dimensional electron gas. The goals accomplished in this research were: Development of Ferroelectric Gate Processing: Deposition processes of the ferroelectric layers were developed and optimised in order to obtain a high quality ferroelectric, while maintaining the original transport properties of AlGaNs 2DEG. The processing of HfO2 and MgO buffer layers were developed and investigated for their effects on limiting unwanted inter-diffusion and charge injection. PZT Gate on Al0.3Ga0.7N: The first successful development and observation of a PZT gate on a Al0.3Ga0.7N/GaN heterostrucutre was accomplished. A (111) oriented PZT(40:60) ferroelectric gate on the Al0.3Ga0.7N heterostructure depleted the sheet resistance of the 2DEG by a factor of three when poling the PZT layer with –40V directly to the conductive cantilever used in a piezoresponse force microscope. This decrease in sheet resistance was stable for more than three days. P(VDF/TrFE)(70:30) Gate on Al0.3Ga0.7N: The ferroelectric co-polymer P(VDF/TrFE) (70:30) was investigated as a gate on the Al0.3Ga0.7N heterostructure. When the P(VDF/TrFE) was poled with –30V to a top electrode the sheet resistance was modulated by a factor three, however there was no retention of this modulation. Ferroelectric Spontaneous Polarisation on a Semiconductor Heterostructure: It was theoretically derived that when depositing a ferroelectric layer onto a semiconductor heterostructure its spontaneous polarisation is dramatically reduced due to the depolarisation field and may be suppressed completely. This decay in spontaneous polarisation can be minimised by using a ferroelectric layer with a small dielectric constant, which justifies the use of ferroelectric polymers as the gate material. Domain Writing:The technique of domain writing using piezoresponse force microscopy showed that it was possible to create domain patterning on the ferroelectric layers that were deposited onto the Al0.3Ga0.7N heterostructure with sub-micron line resolution, on the order of 300nm or better. Using ferroelectrics on semiconductors is not only limited to ferroelectric memory devices. Other applications could be ferroelectric nano-lithography, where a ferroelectric pattern is written with a piezoresponse force microscope, PFM, and this pattern is projected onto the transistors channel, potentially creating quantum/ballistic devices. The challenge of integrating ferroelectrics with semiconductors has yet to be fully understood. One of the main advancements that was reached with this research is the understanding of the decrease of the spontaneous polarisation when a ferrroelectric layer is deposited onto a semiconductor heterostructure of finite thickness. The maximisation of the ferroelectrics polarisation on 20nm of Al0.3Ga0.7N can be obtained when minimising the dielectric constant of the ferroelectric layer. The current challenge is to get a better physical understanding of the limitation of the retention of the spontaneous polarisation, while discovering methods for its improvement.

EPFL2007

1T Memory Cell Based on PVDF-TrFE Field Effect Transistor

Didier Bouvet, Roman Gysel, Mihai Adrian Ionescu, Sebastian Riester, Giovanni Antonio Salvatore, Nava Setter, Igor Stolichnov

Interest in PVDF-TrFE copolymers as ferroelectric material for Memory application is driven by the prospect of having low cost, low operating voltage and fully organic device. Some previous studies reported FET designs using copolymers [refs 1,2] but none of these structures were fully integrated on silicon wafers and using a MOSFET fabrication process. We present for the first time the integration of a PVDF-TrFE (70%-30%) layer into a standard n-MOS transistor through a quasi-standard semiconductor technology. This allows us to achieve a Non Volatile Memory cell and at the same time to compact capacitor-transistor ferroelectric cell into a one-transistor memory cell. The ferroelectric polymer is prepared using a new recipe based on Methyl-Ethyl-Ketone, which helps to reduce considerably the film thickness and the coercive field. The solution is deposited by spin coating down to 100nm and the structures are defined by standard UV lithography. We add a 10nm SiO2 layer between the polymer and the p-doped substrate in order to reduce losses and the screening in the ferroelectric gate (Fig.1a). The ferroelectric properties of the polymer are preserved during the whole process (Fig.1b). We design, fabricate and characterize transistors of different dimensions (from 50μm down to 2μm as channel length and width) demonstrating a good scalability. Experimental Id(Vg) and Id(Vd) curves for different channel lengths and widths are in agreement with the theoretical predictions for such a device (Id~(W/L)Vd. Fig.2-3). The device shows very good hysteresis properties translated in a controllable and reproducible memory behavior. The change in current, due to the polarization of the ferroelectric layer, is in the order of 10^5 and the off-state current is about 10^-9A (Fig. 2-3). Moreover we are able to program the device at about 10V with a programming time in the order of μs. Ageing tests by accumulating multiple cycling have also been performed. We cycled the Vg potential and measured the Drain/Source current after successive series of cycles on same device. After 10^5 cycles the change in the on-state current is about 10% while the one for the off-state current is about 25% but the current window is large enough that the two states are clearly distinguishable. For the retention measurements we apply a voltage pulse on the gate and measure the time response of the drain and source currents. It is found that the retention time depends on the FET dimensions. This can be as long as 3 days for the large transistors (L=W=50μm) and about 5 to 3 hours for smaller ones (for L=W=10μm and L=W=2μm, respectively). This demonstrates the usability of these devices for any disposable electronic applications requiring memory storage for few days.

2008