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Commodity computer clusters are often composed of hundreds of computing nodes. These generally off-the-shelf systems are not designed for high reliability. Node failures therefore drive the MTBF of such clusters to unacceptable levels. The software framewo ...
Institute of Electrical and Electronics Engineers Computer Society, Piscataway, NJ 08855-1331, United States2005
A run-time visualization and solution-steering tool, TPview, has been developed to overcome difficulties commonly encountered with large-scale numerical simulations on high-performance parallel computer systems. TPview provides the interface between the pa ...
Using register renaming and physical registers, modern microprocessors eliminate false data dependences from reuse of the instruction set defined registers (logical registers). High performance processors that have longer pipelines and a greater capacity t ...
We present a system that allows task parallel OpenMP pro grams to execute on a network of workstations (NOW) with a variable number of nodes Such adaptivity, generally called adaptive parallelism, is important in a multi-user NOW environment, enabling the ...
Nowaday, the world of processors is still dominated by the RISC architectures, which foundations have been laid down in the 70's. The RISC concept may be summarized by one word : simplicity. With this concept, much simpler architectures are born, in partic ...
Dynamic parallel schedules (DPS) is a flow graph based framework for developing parallel applications on clusters of workstations. The DPS flow graph execution model enables automatic pipelined parallel execution of applications. DPS supports graceful degr ...
Automatic generation of Instruction Set Extensions (ISEs), executed on a custom processing unit or a coprocessor, is an important step towards processor customization. A typical goal of a manual designer is to combine a large number of atomic instructions ...
In this paper, methods and algorithms are presented for an efficient slicing process specifically designed for microstereolithography, a high-resolution rapid prototyping technology. Modifications are given for different implementation environments (FPU, P ...
The objective of the present work is to make efficient parallelization of evolutionary algorithms (EA) easier in order to solve large instances of difficult combinatorial optimization problems within an acceptable amount of time, on parallel computer archi ...
We present a fully-global linear gyrokinetic simulation code (GYGLES) aimed at describing the unstable spectrum of the ion-temperature-gradient modes in toroidal geometry. We formulate the Particle-In-Cell method with finite elements defined in magnetic co ...
