Publication

Efficient Modelling and Simulation Methodology for the Design of Heterogeneous Mixed-Signal Systems on Chip

Publications associées (151)

Graph Chatbot

Chattez avec Graph Search

Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.

AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.

Connectez-vous pour utiliser Chat avec Graph Search

FPGAs for the Masses: Affordable Hardware Synthesis from Domain-Specific Languages

Nithin George

Field Programmable Gate Arrays (FPGAs) have the unique ability to be configured into application-specific architectures that are well suited to specific computing problems. This enables them to achieve performances and energy efficiencies that outclass oth ...

EPFL2016

Generating Configurable Hardware from Parallel Patterns

Christos Kozyrakis

In recent years the computing landscape has seen an increasing shift towards specialized accelerators. Field programmable gate arrays (FPGAs) are particularly promising for the implementation of these accelerators, as they offer significant performance and ...

Assoc Computing Machinery2016

An Efficient Tool for the Assisted Design of SAR ADCs Capacitive DACs

Andrea Bonetti

The optimal design of SAR ADCs requires the accurate estimate of nonlinearity and parasitic capacitance effects in the feedback charge redistribution DAC. Since both contributions depend on the specific array topology, complex calculations, custom modeling ...

Elsevier Science Bv2016

Imprecise Security: Quality and Complexity Tradeoffs for Hardware Information Flow Tracking

Paolo Ienne, Andrew James Becker, Ryan Charles Kastner, Wei Hu

Secure hardware design is a challenging task that goes far beyond ensuring functional correctness. Important design properties such as non-interference cannot be verified on functional circuit models due to the lack of essential information (e.g., sensitiv ...

Assoc Computing Machinery2016

Robotic rescue simulation for computing teaching in the UK: A case study

Josephine Anna Eleanor Hughes

Physical computing, and robotics in particular, is an excellent tool which can be used to help students understand many aspects of Engineering and Computer Science. However, obtaining and using suitable kits or hardware can involve significant financial ou ...

Institute of Electrical and Electronics Engineers Inc.2016

Beam Dynamics Studies in Recirculating Machines

Dario Pellegrini

The LHeC and the CLIC Drive Beam share not only the high-current beams that make them prone to show instabilities, but also unconventional lattice topologies and operational schemes in which the time sequence of the bunches varies along the machine. In ord ...

EPFL2016

Efficient Hardware Design Of Iterative Stencil Loops

David Atienza Alonso, Ivan Beretta, Alessandro Antonio Nacci

A large number of algorithms for multidimensional signals processing and scientific computation come in the form of iterative stencil loops (ISLs), whose data dependencies span across multiple iterations. Because of their complex inner structure, automatic ...

Ieee-Inst Electrical Electronics Engineers Inc2016

Block Matching Based Real-Time Optical Flow Hardware Implementation

Yusuf Leblebici, Kerem Seyid, Raffaele Capoccia, Andrea Richaud

Optical flow calculation algorithms are hard to implement on hardware level in real-time due to their complexity and high computational load. In this work, we present a novel hierarchical block matching based optical flow algorithm. The algorithm estimates ...

Ieee2016

A semi-continuous formulation for goal-oriented reduced-order models: 1D problems

Stefano Mattei

A semi-continuous formulation is introduced for finding bases that minimise the error in a specific output functional of a reduced-order model. The formulation is advantageous in that it can be used with arbitrary reference data and can be easily applied t ...

Wiley-Blackwell2016

High-level synthesis of dataflow programs for heterogeneous platforms

Endri Bezati

The growing complexity of digital signal processing applications implemented in programmable logic and embedded processors make a compelling case the use of high-level methodologies for their design and implementation. Past research has shown that for comp ...

EPFL2015