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Methodology for the Hardware/Software Co-Design of Dataflow Programs

Publications associées (92)

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Malicious Traffic Detection in Local Networks with Snort

Loïc Etienne

Snort is an open source Network Intrusion Detection System combining the benefits of signature, protocol and anomaly based inspection and is considered to be the most widely de- ployed IDS/IPS technology worldwide. However, Snort's deployment in a large co ...

2009

Dataflow/Actor-Oriented language for the design of complex signal processing systems

Marco Mattavelli, Christophe Lucarz, Ghislain Roquier

Signal processing algorithms become more and more complex and the algorithm architecture adaptation and design processes cannot any longer rely only on the intuition of the designers to build efficient systems. Specific tools and methods are needed to cope ...

2008

OpenDF - A Dataflow Toolset for Reconfigurable Hardware and Multicore Systems

Marco Mattavelli

This paper presents the OpenDF framework and recalls that dataflow programming was once invented to address the problem of parallel computing. We discuss the problems with an imperative style, von Neumann programs, and present what we believe are the advan ...

2008

OpenDF – A Dataﬂow Toolset for Reconﬁgurable Hardware and Multicore Systems

Marco Mattavelli

This paper presents the OpenDF framework and recalls that dataﬂow programming was once invented to address the problem of parallel computing. We discuss the problems with an imperative style, von Neumann programs,and present what we believe are the advanta ...

2008

PyNEST: a convenient interface to the NEST simulator

Eilif Benjamin Muller, Marc-Oliver Gewaltig

The neural simulation tool NEST (http://www.nest-initiative.org) is a simulator for heterogeneous networks of point neurons or neurons with a small number of compartments. It aims at simulations of large neural systems with more than 10^4 neurons and 10^7 ...

Frontiers Research Foundation2008

Corezilla: Build and Tame the Multicore Beast?

James Richard Larus

Are multi-core SoCs being held back by the lack of adequate system design and software development tools? Multi-cores supply the advantages of flexible software-defined architectures, but support for system optimization, integration and verification is lac ...

IEEE2007

Routing Aware Switch Hardware Customization for Networks on Chips

Giovanni De Micheli, Srinivasan Murali

Networks on Chip (NoC) has been proposed as a scalable and reusable solution for interconnecting the ever- growing number of processor/memory cores on a single silicon die. As the hardware complexity of a NoC is significant, methods for designing a NoC wit ...

2006

Processor Enhancements for Media Streaming Applications

Pierre Vandergheynst, Sébastien Bilavarn

The development of more processing demanding applications on the Internet (video broadcasting) on one hand and the popularity of recent devices at the user level (digital cameras, wireless videophones, ...) on the other hand introduce challenges at several ...

Springer, Kluwer Academic Publishers2005

Adding limited reconfigurability to superscalar processors

Marc Epalza

For the last thirty years, electronics, at first built with discrete components, and then as Integrated Circuits (IC), have brought diverse and lasting improvements to our quality of life. Examples might include digital calculators, automotive and airplane ...

EPFL2004

Generic Concern-Oriented Model Transformations Meet AOP

Abstract. Separation of concerns allows developers to manage large distributed systems by tackling one problem at a time. Model transformations refine models along one concern-dimension. Aspects encapsulate implementation details that cut across the bounda ...

2003