Publication

Cache Considerations for Programmers of Multiprocessors

Publications associées (46)

Graph Chatbot

Chattez avec Graph Search

Posez n’importe quelle question sur les cours, conférences, exercices, recherches, actualités, etc. de l’EPFL ou essayez les exemples de questions ci-dessous.

AVERTISSEMENT : Le chatbot Graph n'est pas programmé pour fournir des réponses explicites ou catégoriques à vos questions. Il transforme plutôt vos questions en demandes API qui sont distribuées aux différents services informatiques officiellement administrés par l'EPFL. Son but est uniquement de collecter et de recommander des références pertinentes à des contenus que vous pouvez explorer pour vous aider à répondre à vos questions.

Connectez-vous pour utiliser Chat avec Graph Search

Shared-Memory Performance Profiling

James Richard Larus

This paper describes a new approach to finding performance bottlenecks in shared-memory parallel programs and its embodiment in the Paradyn Parallel Performance Tools running with the Blizzard fine-grain distributed shared memory system. This approach expl ...

ACM1997

The Tempest Approach to Distributed Shared Memory

James Richard Larus, David Wood

This paper summarizes how distributed shared memory (DSM) can be both efficiently and portably supported by the Tempest interface. Tempest is a collection of mechanisms for communication and synchronization in parallel programs. These mechanisms provide co ...

IEEE1996

Performances of multiprocessor multidisk architectures for continuous media storage

Roger Hersch

Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In order to fulfill these requirements, the authors consider a parallel image server ...

SPIE-Int. Soc. Opt. Eng1996

TreadMarks: Shared Memory Computing on Networks of Workstations

Willy Zwaenepoel, Sandhya Dwarkadas

TreadMarks supports parallel computing on networks of workstations by providing the application with a shared memory abstraction. Shared memory facilitates the transition from sequential to parallel programs. After identifying possible sources of paralleli ...

1996

StormWatch: A Tool for Visualizing Memory System Protocols

James Richard Larus

Recent research has offered programmers increased options for programming parallel computers by exposing system policies (e.g., memory coherence protocols) or by providing several programming paradigms (e.g. message passing and shared memory) on the same p ...

ACM/IEEE1995

Cachier: A Tool for Automatically Inserting CICO Annotations

James Richard Larus

Shared memory in a parallel computer provides programmers with the valuable abstraction of a shared address space--through which any part of a computation can access any datum. Although uniform access simplifies programming, it also hides communication, wh ...

IEEE1994

Parallelization of General Linkage Analysis Problems

Willy Zwaenepoel, Sandhya Dwarkadas

We describe a parallel implementation of a genetic linkage analysis program that achieves good speedups, even for analyses on a single pedigree and with a single starting recombination fraction vector. Our parallel implementation has been run on three diff ...

1994

Fine-grain access control for distributed shared memory

Babak Falsafi, James Richard Larus, David Wood

The paper discusses implementations of fine-grain memory access control, which selectively restricts reads and writes to cache-block-sized memory regions. Fine-grain access control forms the basis of efficient cache- coherent shared memory. The paper focus ...

1994

LCM: Memory System Support for Parallel Language Implementation

James Richard Larus

Higher-level parallel programming languages can be difficult to implement efficiently on parallel machines. This paper shows how a flexible, compiler-controlled memory system can help achieve good performance for language constructs that previously appeare ...

ACM1994

The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers

James Richard Larus, David Wood

We have developed a new technique for evaluating cache coherent, shared-memory computers. The Wisconsin Wind Tunnel (WWT) runs a parallel shared-memory program on a parallel computer (CM-5) and uses execution-driven, distributed, discrete-event simulation ...

ACM1993