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Optimizing Communication in HPF programs for Fine-Grain Distributed Shared Memory

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Leaderless Consensus

Rachid Guerraoui, Vincent Gramoli, Mihail Igor Zablotchi, Karolos Antoniadis, Antoine Philippe Matthieu Desjardins

Abstract—Classical synchronous consensus algorithms are leaderless: processes exchange their proposals, pick the max and decide when they see the same choice across a couple of rounds. Indulgent consensus algorithms are more robust in that they only req ...

2021

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Classical synchronous consensus algorithms are leaderless: processes exchange their proposals, retain the maximum value and decide when they see the same choice across a couple of rounds. Indulgent consensus algorithms are more robust in that they only req ...

IEEE COMPUTER SOC2021

Parallel Hybrid Simulations of Block Copolymer Nanocomposites using Coarray Fortran

Ignacio Pagonabarraga Mora

Computer simulations of experimentally comparable system sizes in soft matter often require considerable elapsed times. The use of many cores can reduce the needed time, ideally proportionally to the number of processors. In this paper a parallel computati ...

WILEY-V C H VERLAG GMBH2021

Just-in-time performance without warm-up

Denys Shabalin

Scala has been developed as a language that deeply integrates with the Java ecosystem. It offers seamless interoperability with existing Java libraries. Since the Scala compiler targets Java bytecode, Scala programs have access to high-performance runtimes ...

EPFL2020

Passing Messages while Sharing Memory

Rachid Guerraoui, Naama Ben David

We introduce a new distributed computing model called m&m that allows processes to both pass messages and share memory. Motivated by recent hardware trends, we find that this model improves the power of the pure message-passing and shared-memory models. As ...

ASSOC COMPUTING MACHINERY2018

Miniphases: Compilation using Modular and Efficient Tree Transformations

Martin Odersky, Dmytro Petrashko, Ondrej Lhoták

Production compilers commonly perform dozens of transformations on an intermediate representation. Running those transformations in separate passes harms performance. One approach to recover performance is to combine transformations by hand in order to red ...

Assoc Computing Machinery2017

Efficient Communication and Synchronization on Manycore Processors

Darko Petrovic

The increased number of cores integrated on a chip has brought about a number of challenges. Concerns about the scalability of cache coherence protocols have urged both researchers and practitioners to explore alternative programming models, where cache co ...

EPFL2015

Common Subexpression Elimination in Dotty

Martin Odersky, Dmytro Petrashko, Allan Vincent Roger Renucci

Common subexpression elimination is a well-known compiler optimisa- tion that improves running time of compiled applications by avoiding the repetition of the same computation. Although it has been implemented on a low level such as bytecode, it misses mul ...

2015

Leveraging Hardware Message Passing for Efficient Thread Synchronization

André Schiper, Thomas Ropars, Darko Petrovic

As the level of parallelism in manycore processors keeps increasing, providing efficient mechanisms for thread synchronization in concurrent programs is becoming a major concern. On cache-coherent shared-memory processors, synchronization efficiency is ult ...

2014

Leveraging Hardware Message Passing for Efficient Thread Synchronization

André Schiper, Thomas Ropars, Darko Petrovic

Assoc Computing Machinery2014