Cross-band aided acquisition on HEO orbit

Cyril Botteron, Vincenzo Capuano, Pierre-André Farine, Jérôme Leclère, Jia Tian, Yanguang Wang, Wei Wang
International Astronautical Federation, 2014
Article de conférence

Résumé

Global positioning system (GPS) has been demonstrated to be a valid and efficient system for various space applications in low Earth orbit (LEO) and medium Earth orbit (MEO), such as for location determination and time synchronization. However, in highly elliptical and high Earth orbits (HEO), the number of existing space applications is much smaller because of the very weak power of the received signals and the bad geometric dilution of precision (GDOP). To counteract these problems, one method is to add an L5 processing module to the existing L1 C/A receiver module. Indeed, tracking the L5 signal brings several benefits: 1) a higher ranging precision; 2) a pilot channel allowing long integration times, which is helpful for both acquisition and tracking. But this also implies several drawbacks, especially in resource restricted conditions: 1) the length of the fast Fourier transforms (FFTs) and the amount of memory needed for the L5 acquisition module is huge; 2) the acquisition time is very long because of the secondary code and large frequency search space due to the long integration time. In this paper, a cross-band aided acquisition method for the L1&L5 signals is presented, which satisfy the requirements for extremely high sensitive environment without any further assistance. Compared to a traditional architecture that would acquire the L1 and L5 signals sequentially, this method acquires the L1 signal in the first place because its structure is simpler and there is no need to search the secondary code, then uses this information to reduce the code and frequency search space of the L5 signals. This brings huge benefits to the receiver: 1) the resources needed for the L5 acquisition are tremendously reduced; 2) the acquisition time for the L5 signal is considerably reduced. The implementation on an Altera Stratix III FPGA shows that about 7 % of the logic, 18 % of the multipliers and 47 % of the memory can be saved with the proposed method, while the acquisition time is reduced by 99 %.

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https://infoscience.epfl.ch/record/202181?ln=fr

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Cyril Botteron, Vincenzo Capuano, Pierre-André Farine, Jérôme Leclère, Jia Tian, Yanguang Wang, Wei Wang
International Astronautical Federation, 2014
Article de conférence

Résumé

Official source

https://infoscience.epfl.ch/record/202181?ln=fr

À propos de ce résultat

Concepts associés (22)

Concepts associés

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Publications associées (15)

Publications associées

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Comparison Framework of FPGA-based GNSS Signals Acquisition Architectures

Cyril Botteron, Pierre-André Farine, Jérôme Leclère

The acquisition of Global Navigation Satellite Systems signals using Code Division Multiple Access can be performed through classical correlation or using a Fourier transform. These methods are well known but what is missing is a comparison of their performance for a given hardware area or target. This paper presents this comparison for Field Programmable Gate Arrays, describing the different parameters involved in the acquisition, detailing some optimized implementations where hardware elements are duplicated, and estimating and discussing the performances. The influence of the Doppler effect on the code, is also discussed as it plays an important role, particularly for new signals using a high chipping rate.

Institute of Electrical and Electronics Engineers2013

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, ,

This paper proposes alternative architectures to perform a circular correlation using the Fast Fourier Transform (FFT) by decomposing the initial circular correlation into several smaller circular correlations. The approach used is similar to the Fast Finite Impulse Response (FIR) Algorithms (FFAs). These architectures improve the performance in terms of reduced processing time or resource usage, and consequently lower the energy consumption. The results can be applied to any system that performs circular convolution or correlation. In this paper, the application is the acquisition of Global Navigation Satellite System (GNSS) signals with the FFT-based Parallel Code-phase Search (PCS), and more precisely on the GPS L1 C/A signal, when the target considered is a Field Programmable Gate Array (FPGA). In this context, it is for example shown that it is possible with one of the proposed architectures to reduce the logic usage by 11 %, the memory usage by 41 %, and the Digital Signal Processing (DSP) block usage by 32 %, while keeping the same processing time. With another architecture, it is shown that the processing time can be halved by increasing the logic usage by only 35 %, while reducing the memory usage and keeping the same DSP usage. Note that the proposed approach is not based on an approximation of the traditional method, but a modified implementation providing the same result. Thus, there is no loss of sensitivity.

2012

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Acquisition of modern GNSS signals using a modified parallel code-phase search architecture

Cyril Botteron, Pierre-André Farine, Jérôme Leclère

The acquisition of global navigation satellite system signals can be performed using a fast Fourier transform (FFT). The FFT-based acquisition performs a circular correlation, and is thus sensitive to potential transitions between consecutive periods of the code. Such transitions are not occurring often for the GPS L1 C/A signal because of the low data rate, but very likely for the new GNSS signals having a secondary code. The straightforward solution consists in using two periods of the incoming primary code and using zero-padding for the local code to perform the correlation. However, this solution increases the complexity, and is moreover not efficient since half of the points calculated are discarded. This has led us to research for a more efficient algorithm, which discards less points by calculating several sub-correlations. It is applied to the GPS L5, Galileo E5a, E5b and E1 signals. Considering the radix-2 FFT, the proposed algorithm is more efficient for the L5, E5a and E5b signals, and possibly for the E1 signal. The theoretical number of operations can be reduced by 21%, the processing time measured on a software implementation is reduced by 39%, and the memory resources are almost halved for an FPGA implementation.

Elsevier Science Bv2014

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