Publication
A Compiler for Parallel and Resource-Constrained Programmable in-Memory Computing
Publications associées (52)
Deep-submicron embedded processor architectures for high-performance, low-cost and low-power
Because the market has an insatiable appetite for new functionality, performance is becoming an increasingly important factor. The telecommunication and network domains are especially touched by this phenomenon but they are not the only ones. For instance, ...
EPFL2007CONFETTI : A reconfigurable hardware platform for prototyping cellular architectures
Daniel Mange, Pierre-André Mudry, Fabien Vannel
In this article, we describe a novel hardware platform aimed at the realization of cellular architectures. The system is built hierarchically from a very simple computing unit, called ECell. Several of these units can then be connected, using a high-speed ...
2007The Weight-Watcher Service and its Lightweight Implementation
Rachid Guerraoui, Maxime Monod, Benoît Garbinato, Jesper Honig Spring, Alexei Kounine
This paper presents the Weight-Watcher service. This service aims at providing resource consumption measurements and estimations for software executing on resource constrained devices. By using the Weight-Watcher, software components can continuously adapt ...
2007Introduction of Local Memory Elements in Synthesis of Instruction Set Extensions
Automatic generation of Instruction Set Extensions (ISEs), executed on a custom processing unit or a coprocessor, is an important step towards processor customization. A typical goal of a manual designer is to combine a large number of atomic instructions ...
2003Dispositif électronique à affichage électro-optique commandé par des circuits logiques programmables
Daniel Mange, Christof Teuscher
NOVELTY - The electronic display (2) includes a number of cells (12) whose upper faces form a display surface, each cell has an electro-optic display unit (6) with inputs (14) for data to be displayed. A programmable logic circuit (20) is associated with f ...
2001Specifying the Semantics of Machine Instructions
Computer architecture manuals describe the instruction set of the machine and the semantics of those instructions by a combination of natural language and ISP (Instruction Set Processor) descriptions. The syntax of the instructions in assembly is well defi ...
IEEE Computer Society1998Spyder
The Spyder project consists of the development of a reconfigurable processor as well as its application development environment. The name Spyder is an anagram of the first letters of "REconfigurable Processor Development SYstem", where the term reconfigura ...
EPFL1996Sampled Dynamic Holographic Memory
We report the experimental demonstration of a photorefractive dynamic holographic memory that has a simple feedback architecture stabilized through a novel spatial sampling technique. By using dynamic copying to compensate for photorefractive decay, this m ...
1992Sender-Based Message Logging
Sender-based message logging, a low-overhead mechanism for providing transparent fault-tolerance in distributed systems, is described. It differs from conventional message logging mechanisms in that each message is logged in volatile memory on the machine ...
1987