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Low-Overhead Dynamic Instruction Mix Generation using Hybrid Basic Block Profiling

Publications associées (33)

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Memory Organization and Data Layout for Instruction Set Extensions with Architecturally Visible Storage

Paolo Ienne, Yusuf Leblebici, Philip Brisk, Panagiotis Athanasopoulos

Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional units (CFUs). Adoption of the optimal ISE for an application would, in many cas ...

2009

Graphical display for annual climate-based daylight simulation

Marilyne Andersen, Magali Bodart

Due to daylight variability, a design cannot be thoroughly assessed using single-moment simulations, which is why we need dynamic performance metrics like Daylight Autonomy and Useful Daylight Illuminance. Going one step further, the annual variation in pe ...

2008

Normalisation of Histogrammed List Mode Data

Many PET scanners nowadays have the possibility to record event-by-event information, known as list mode data. This has the advantage of keeping the data in the highest possible resolution (both temporal and spatial). In most cases, list mode data are then ...

2008

Improving instruction cache performance in OLTP

Anastasia Ailamaki

Instruction-cache misses account for up to 40%; of execution time in online transaction processing (OLTP) database workloads. In contrast to data cache misses, instruction misses cannot be overlapped with out-of-order execution. Chip design limitations do ...

Association for Computing Machinery2006

Accurate and complexity-effective spatial pattern prediction

Babak Falsafi

Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixed cache line sizes to balance the exploitation of spatial and temporal locality, a ...

2004

Processeur à haut degré de parallélisme basé sur des composantes sérielles

Ralph Hoffmann

Nowaday, the world of processors is still dominated by the RISC architectures, which foundations have been laid down in the 70's. The RISC concept may be summarized by one word : simplicity. With this concept, much simpler architectures are born, in partic ...

EPFL2004

Browsing Recorded Meetings with Ferret

Browsing for elements of interest within a recorded meeting is time-consuming. We describe work in progress on a meeting browser, which aims to support this process by displaying many types of data. These include media, transcripts and processing results, ...

IDIAP2004

Hiding Synchronization Delays in a GALS Processor Microarchitecture

Sandhya Dwarkadas

We analyze an Alpha 21264-like Globally–Asynchronous, Locally–Synchronous (GALS) processor organized as a Multiple Clock Domain (MCD) microarchitecture and identify the architectural features of the processor that influence the limited performance degradat ...

2004

Dynamic Data Dependence Tracking and Its Application to Branch Prediction

Lei Chen

To continue to improve processor performance, microarchitects seek to increase the effective instruction level parallelism (ILP) that can be exploited in applications. A fundamental limit to improving ILP is data dependences among instructions. If data dep ...

2003

Temperature dependence of electronic states in (TaSe4)(2)I - Reply

Giorgio Margaritondo, Helmuth Berger

We reject the assertion of Claessen et al., confirm the validity of our data, and discuss possible causes for the disagreement. ...

1997