Small-animal and endoscopic PET detector modules based on multichannel digital silicon photomultipliers

In time-of-flight (TOF) positron emission tomography (PET), the coincidence resolving time (CRT) has a strong influence on the overall performance. Multichannel digital silicon photomultipliers (MD-SiPMs) are able to obtain several timestamps for gamma photon timemark estimation. Using this feature, the CRT is improved and the system robustness is significantly increased by utilizing multiple photoelectron timestamps. In addition, the PET instrumentation chain is simplified because of the intrinsic digitization and integrated functionality of the MD-SiPM. The main objective of this work is to demonstrate the possibility of building a complete highly-miniaturized PET detector module for endoscopic applications. In addition, we show that it's possible to operate simultaneously several MD-SiPM array chips in order to build a small-animal PET detector modules. We present the implementation of two PET detector modules that are based on MD-SiPMs: a small animal and an endoscopic PET detector modules. The small animal PET detector module consists of 2×4 monolithic MD-SiPM array chips. In addition, this module includes a low-cost field programmable gate array (FPGA), a temperature controlling system and data transfer interfaces. The endoscopic PET detector module comprises a single monolithic array of 9×18 MD-SiPM and a small form-factor FPGA. In this module, a remarkable level of compactness is achieved. Eventually, a thermal characterization and a preliminary radiation measurement are presented.

Toward a Full-Flexible and Fast-Prototyping TOF-PET Block Detector Based on TDC-on-FPGA

Edoardo Charbon, Esteban Venialgo Araujo

Typically, a time-of-flight (TOF) positron emission tomography (PET) block detector is built using application-specific integrated circuits (ASICs), since they integrate a high number of channels at a reasonable power consumption and into a small area. However, ASICs' flexibility is limited and prototyping times are long because a semiconductor fabrication process is required in every design iteration. Alternatively, fast terminal (FT) silicon photomultipliers (SiPMs) require a simplified analog front-end in order to achieve TOF accuracy. In addition, field-programmable gate arrays (FPGAs) can allocate time-to-digital converters as well as complex digital readout logics. In this paper, we propose building TOF-PET block detectors based on FPGAs, FT-SiPMs, and minimal amount of off-the-shelf components. In this way, TOE-PET accuracy is achieved with a full-flexible and fast prototyping solution. We evaluated the coincidence resolving time, performance degradations due to channel multiplexing, energy resolution, and scintillator pixel encoding performance of SiPM arrays utilizing the proposed approach. Experimental results show minimal timing degradations, when multiplexing FTs. Moreover, simulation results show a low reduction in the singles count rate of multiplexed channels at typical brain-PET radioactive doses.

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

Plug-and-play TOF-PET Module Readout Based on TDC-on-FPGA and Gigabit Optical Fiber Network

Edoardo Charbon, Esteban Venialgo Araujo

Positron Emission Tomography (PET) scanner technology requires the use of a large number of PET detector modules that work in a parallel and synchronous manner. Moreover, system modularity is a desirable feature, that enables technology reutilization for different PET applications and geometries. Additionally, Time-of-Flight (TOF) PET requires a synchronization error, between the modules, below hundred picoseconds in order not to degrade the system level coincidence-resolving-time significantly. In a modular approach, every PET detector module, which typically is composed of a photodetector coupled to a scintillator, includes mixed-signal electronics and a data transmission system. If a host-based architecture is chosen for connecting all the modules to a central acquisition unit, a significant complexity is added at interconnection level and the modularity is reduced. This work aims to a full flexible and fast prototyping solution, where all the estimation methods are integrated in a Field Programmable Gate Array (FPGA), and the analog part is built with off-the-shelf components. An exploration and solution of module connection is proposed in order to reduce complexity and allowing full modularity. Every module hosts a FPGA that includes the data transmission resources and a multi-channel and high-performance Time-to-Digital Converter (TDC), with single-shoot channel precision below 12.5 ps r.m.s. In this way, it performs not only the timing measurement but also position and energy estimation, as well as independent data transmission. Furthermore, the connections are realized using optical fibers driven by Gigabit Transceivers (GT). In this way, we guarantee a physical link up to 8 Gb/s that makes feasible to sustain a global measure rate of 300 Mega measures per second. Moreover, the optical fiber link guaranties null electromagnetic interference that affects the analog stages or other sensitive parts.

IEEE2019

SPADnet: Embedded coincidence in a smart sensor network for PET applications

Claudio Bruschini, Edoardo Charbon, Gabor Nemeth

n this paper we illustrate the core technologies at the basis of the European SPADnet project (www.spadnet.eu), and present the corresponding first results. SPADnet is aimed at a new generation of MRI-compatible, scalable large area image sensors, based on CMOS technology, that are networked to perform gamma-ray detection and coincidence to be used primarily in (Time-of-Flight) Positron Emission Tomography (PET). The project innovates in several areas of PET systems, from optical coupling to single-photon sensor architectures, from intelligent ring networks to reconstruction algorithms. In addition, SPADnet introduced the first computational model enabling study of the full chain from gamma photons to network coincidence detection through scintillation events, optical coupling, etc.

Elsevier2014

Plug-and-play TOF-PET Module Readout Based on TDC-on-FPGA and Gigabit Optical Fiber Network

Edoardo Charbon, Esteban Venialgo Araujo

IEEE2019