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Design and automated fabrication scenario for a wood shingle-based envelope system

Publications associées (32)

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MOVE Processors That Self-replicate and Differentiate

Yann Thoma, Joël Rossier, Pierre-André Mudry

This article describes an implementation of a basic multiprocessor system that exhibits replication and differentiation abilities on the POEtic tissue, a programmable hardware designed for bio-inspired applications. As for a living organism, whose existenc ...

2006

Improving instruction cache performance in OLTP

Anastasia Ailamaki

Instruction-cache misses account for up to 40%; of execution time in online transaction processing (OLTP) database workloads. In contrast to data cache misses, instruction misses cannot be overlapped with out-of-order execution. Chip design limitations do ...

Association for Computing Machinery2006

Processeur à haut degré de parallélisme basé sur des composantes sérielles

Ralph Hoffmann

Nowaday, the world of processors is still dominated by the RISC architectures, which foundations have been laid down in the 70's. The RISC concept may be summarized by one word : simplicity. With this concept, much simpler architectures are born, in partic ...

EPFL2004

A flexible framework for efficient design of advanced 3D audio systems in multimedia applications

Aleksandar Simeonov

The recent advance of computer technology pushed the computing power of the modern computer systems to unprecedented levels; modern processors moved from the conventional, scalar type of architecture to more sophisticated, parallel ones, combining fast pro ...

EPFL2004

Introduction of Local Memory Elements in Synthesis of Instruction Set Extensions

Paolo Ienne

Automatic generation of Instruction Set Extensions (ISEs), executed on a custom processing unit or a coprocessor, is an important step towards processor customization. A typical goal of a manual designer is to combine a large number of atomic instructions ...

2003

Using Cohort-Scheduling to Enhance Server Performance

James Richard Larus

A server application is commonly organized as a collection of concurrent threads, each of which executes the code necessary to process a request. This software architecture, which causes frequent control transfers between unrelated pieces of code, decrease ...

Usenix2002

Selective, accurate, and timely self-invalidation using last-touch prediction

Babak Falsafi

Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper proposes Last-Touch Predictors (LTPs) that learn and predict the “last touch ...

2000

Specifying the Semantics of Machine Instructions

Shane Sendall

Computer architecture manuals describe the instruction set of the machine and the semantics of those instructions by a combination of natural language and ISP (Instruction Set Processor) descriptions. The syntax of the instructions in assembly is well defi ...

IEEE Computer Society1998

Spyder

Christian Iseli

The Spyder project consists of the development of a reconfigurable processor as well as its application development environment. The name Spyder is an anagram of the first letters of "REconfigurable Processor Development SYstem", where the term reconfigura ...

EPFL1996

Massively parallel computing and factoring

Arjen Lenstra

Knowing the limits of factoring capabilities is important for various reasons. A favorite example is the security of factoring based cryptosystems, which is based on our inability to solve the factoring problem. There are also cryptosystems, however, which ...

1992