Publication
A low-power digital charge balancing system, which ensures the safe operation of constant-current biphasic stimulation is presented. The concept of the proposed charge-balancing technique is to utilize a hybrid method consisting of anodic pulse modulation and short-term offset current injection. Furthermore, a dual thresholding strategy is employed to guarantee precise and low-power imbalance compensation. The charge-balancing system is capable of canceling large persistent imbalances by adjusting the input code of an 8-bit current-steering digital-to-analog converter (DAC) as well as injecting an offset current in a power-efficient way. The performance of the designed charge balancer is evaluated by modeling a 1 mA biphasic constant-current stimulator with 8-bit DAC resolution. The charge-balancing system is implemented on a Cyclone IV FPGA, and measurement results evidence the safe, accurate and low-power charge-balancing performance in which the balance offset current injection is performed in less than 5% of the stimulation time while the dynamic power consumption is at 0.76 mW.