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In this paper, a synchrophasor estimation (SE) algorithm is presented to simultaneously comply with the requirements for the P and M phasor measurement unit (PMU) performance classes. The method employs a second-order generalized integrator (SOGI) quadrature signal generator (QSG) filter to attenuate the self-interference of the fundamental tone. Inspired by other static state-of-the-art SE methods, the algorithm combines a three-point IpDFT with a three-cycle Hanning window delivering a reduction in the total computational cost. Its performance with respect to all the operating conditions defined by the IEC/IEEE Std. 60255–118 is assessed and compared with another state-of-the-art technique. Furthermore, a computational complexity analysis is performed to assess the potential viability of the proposed SE algorithm for its implementation in embedded devices.
Alexandre Schmid, Keyvan Farhang Razi
Arjen Lenstra, Robert Granger, Thorsten Kleinjung, Benjamin Pierre Charles Wesolowski
Richard Lee Davis, Engin Walter Bumbacher, Jérôme Guillaume Brender