Jitter Tolerance Analysis of Clock and Data Recovery Circuits using Matlab and VHDL-AMS
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Institute of Electrical and Electronics Engineers2005
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We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and methods used to specify block constraints, to design and verify the topology down t ...
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Institute of Electrical and Electronics Engineers2005
This work shows experiments on the retrieval of handwritten documents. The performance of the same state-of-the-art Information Retrieval system is compared when dealing with manual (no errors) and automatic (Word Error Rate around 50%) transcriptions of t ...
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Real-time audio over the best effort Internet often suffers from packet loss. So far, Forward Error Correction (FEC) seems to be an efficient way to attenuate the impact of loss. Nevertheless to ensure efficiency of FEC, the source rate must be continuousl ...
Real-time audio over the best effort Internet often suffers from packet loss. At this time, Forward Error Correction (FEC) seems to be an efficient way to attenuate the impact of loss. Nevertheless to ensure efficiency of FEC, the source rate must be conti ...
