Publications associées à Attention-based domain adaptation for single-stage detectors

Microarchitectural Low-Power Design Techniques for Embedded Microprocessors

With the omnipresence of embedded processing in all forms of electronics today, there is a strong trend towards wireless, battery-powered, portable embedded systems which have to operate under stringent energy constraints. Consequently, low power consumpti ...

EPFL2016

Micro-architectural Analysis of In-memory OLTP

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Utku Sirin

Micro-architectural behavior of traditional disk-based online transaction processing (OLTP) systems has been investigated extensively over the past couple of decades. Results show that traditional OLTP mostly under-utilize the available micro-architectural ...

2016

A Methodology for Profiling and Partitioning Stream Programs on Many-core Architectures

Marco Mattavelli, Malgorzata Maria Michalska, Jani Boutellier

Maximizing the data throughput is a very common implementation objective for several streaming applications. Such task is particularly challenging for implementations based on many-core and multi-core target platforms because, in general, it implies tackli ...

2015

Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment

Andreas Peter Burg, Georgios Karakonstantis, Jeremy Hugues-Felix Constantin, Anupam Chattopadhyay

Static timing analysis provides the basis for setting the clock period of a microprocessor core, based on its worst-case critical path. However, depending on the design, this critical path is not always excited and therefore dynamic timing margins exist th ...

2015

Ultra-Low Power Multicore Architecture For Parallel Biomedical Signal Processing

David Atienza Alonso, Andreas Peter Burg, Ahmed Yasir Dogan, Jeremy Hugues-Felix Constantin

A multi-core architecture with ultra-low power consumption is needed for a wide variety of applications, especially in the bio-medical domain. In this patent, an ultra-low power multi-core architecture is presented: it is composed of one or more cores, sev ...

2014

Pipelined Numerical Integration on Reduced Accuracy Architectures for Power System Transient Simulations

Maher Kayal, Georgios Lilis, Sidi-Rachid Cherkaoui, Theodoros Kyriakidis, Guillaume Olivier Lanz

This work concerns a dedicated mixed-signal power system dynamic simulator. The equations that describe the behavior of a power system can be decoupled in a large linear system that is handled by the analog part of the hardware, and a set of differential e ...

IEEE2014

ADDICT: Advanced Instruction Chasing for Transactions

Anastasia Ailamaki, Pinar Tözün

Recent studies highlight that traditional transaction processing systems utilize the micro-architectural features of modern processors very poorly. L1 instruction cache and long-latency data misses dominate execution time. As a result, more than half of th ...

2014

Energy-Aware Processing Platform Exploration for Embedded Biosignal Analysis

Ahmed Yasir Dogan

According to the World Health Organization, lifestyle-related diseases, e.g., cardiovascular diseases are the major cause of mortality worldwide. An accurate and continuous medical supervision is highly required for diagnosis and treatment of such diseases ...

EPFL2013

STREX: Boosting Instruction Cache Reuse in OLTP Workloads Through Stratified Transaction Execution

Anastasia Ailamaki, Pinar Tözün, Xin Tong

Online transaction processing (OLTP) workload performance suffers from instruction stalls; the instruction footprint of a typical transaction exceeds by far the capacity of an L1 cache, leading to ongoing cache thrashing. Several proposed techniques remove ...

2013

Instruction Set Extensions for Cryptographic Hash Functions on a Microcontroller Architecture

Andreas Peter Burg, Jeremy Hugues-Felix Constantin

In this paper, we investigate the benefits of instruction set extensions (ISEs) on a 16-bit microcontroller architecture for software implementations of cryptographic hash functions, using the example of the five SHA-3 final round candidates. We identify t ...

Ieee2012