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Lecture
Are you an EPFL student looking for a semester project?
Work with us on data science and visualisation projects, and deploy your project as an app on top of Graph Search.
This lecture covers the practical exercise session on CMOS circuit design, focusing on layout optimization techniques. The session includes designing a common-centroid layout for an NMOS differential pair, sizing current source MOSFETs, simulating differential and common-mode gains, and analyzing circuit performance. Students will learn to iterate MOSFET sizing for optimal performance, understand the impact of resistor mismatches on gain, and design a CMOS circuit meeting specific specifications.