Are you an EPFL student looking for a semester project?
Work with us on data science and visualisation projects, and deploy your project as an app on top of Graph Search.
This lecture covers the setup of a test environment for VLSI design, including the schematic design of components, flip-flop designs, and multiple-bit wire naming conventions. Students will learn to finalize the design of components, start top-level schematic, and simulate the functionality of a 64-bit adder with provided testbench.