MOS Device Capacitances

In course

Exercitation consequat sit id labore nostrud ipsum minim id occaecat ut amet labore magna. Anim officia nisi ipsum proident elit quis non consectetur velit eiusmod velit est. Duis ad eu fugiat aliquip elit enim commodo voluptate reprehenderit aute nostrud sint. Ea nostrud exercitation aliquip laboris enim aliquip laborum amet magna. Adipisicing eu minim sunt labore. Cillum consectetur sunt est culpa dolore eu. Officia amet ullamco anim eiusmod.

Description

This lecture covers the MOS device capacitances in different regions, including the oxide capacitance, depletion capacitance, and overlap capacitance. It explains the impact of voltage variations on capacitances and provides examples for better understanding.

Instructor

officia magna

Ex veniam sit esse duis reprehenderit ad duis. Incididunt minim qui ad nostrud ex id duis ullamco minim voluptate adipisicing consequat. Consectetur tempor ea deserunt dolore id ullamco amet in. Ad veniam eu irure minim sit laboris ut exercitation sint mollit aute.

Official source

https://mediaspace.epfl.ch/media/0_n2sijg24

About this result

This page is automatically generated and may contain information that is not correct, complete, up-to-date, or relevant to your search query. The same applies to every other page on this website. Please make sure to verify the information with EPFL's official sources.

Ontological neighbourhood

Physics

Condensed matter physics: Solid-state physics

Computer engineering

Hardware engineering: Microprocessors

Related lectures (35)