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This paper presents a switched-capacitor simulator, optimized for fast computations. Two CAD tools are implemented in order to perform Monte-Carlo simulations, to identify sensitive parasitic coupling prior to layout and to rapidly verify parasitic coupling from an existing layout. Simulation results and measurements on a ΣΔ ADC are compared to validate the tools. © 2011 IEEE.
Ignacio Alejandro Polanco Lobos
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