A cryo-CMOS chip that integrates silicon quantum dots and multiplexed dispersive readout electronics

An integrated circuit fabricated using industry-standard 40 nm complementary metal-oxide-semiconductor technology can combine silicon quantum devices, digital addressing and analogue multiplexed dispersive readout electronics. As quantum computers grow in complexity, the technology will have to evolve from large distributed systems to compact integrated solutions. Spin qubits in silicon quantum dots are thought to offer good scalability because both spin-carrying quantum dots and support complementary metal-oxide-semiconductor (CMOS) electronics can, in principle, be monolithically integrated on a single chip. However, monolithically integrated quantum-classical hybrid circuits based on industry-standard CMOS technology remain limited. Here we report a millikelvin integrated circuit fabricated using 40 nm CMOS technology that integrates silicon quantum-dot arrays with support electronics in an architecture that allows the array to be efficiently addressed and read. The architecture contains integrated microwave lumped-element resonators for dispersive sensing of the charge state of the quantum dots, mediated via digital transistors in a column-row-addressing distribution. With the chip, we demonstrate combined time- and frequency-division multiplexing, which scales sublinearly the resources as well as footprint required for readout.