Pierre DillenbourgA former teacher in elementary school, Pierre Dillenbourg graduated in educational science (University of Mons, Belgium). He started his research on learning technologies in 1984. In 1986, he has been on of the first in the world to apply machine learning to develop a self-improving teaching system. He obtained a PhD in computer science from the University of Lancaster (UK), in the domain of artificial intelligence applications for education. He has been assistant professor at the University of Geneva. He joined EPFL in 2002. He has been the director of Center for Research and Support on Learning and its Technologies, then academic director of Center for Digital Education, which implements the MOOC strategy of EPFL (over 2 million registrations). He is full professor in learning technologies in the School of Computer & Communication Sciences, where he is the head of the CHILI Lab: "Computer-Human Interaction for Learning & Instruction ». He is the director of the leading house DUAL-T, which develops technologies for dual vocational education systems (carpenters, florists,...). With EPFL colleagues, he launched in 2017 the Swiss EdTech Collider, an incubator with 80 start-ups in learning technologies. He (co-)-founded 4 start-ups, does consulting missions in the corporate world and joined the board of several companies or institutions. In 2018, he co-founded LEARN, the EPFL Center of Learning Sciences that brings together the local initiatives in educational innovation. He is a fellow of the International Society for Learning Sciences. He currently is the Associate Vice-President for Education at EPFL.
Pierre-André FarinePierre-André Farine received the Doctoral and Engineering Degrees in Microtechnology from University of Neuchâtel, Switzerland, respectively in 1984 and 1978, and the Engineering in Microtechnology from ETS Le Locle in 1974.
He was working 17 years for the Swiss watch industries (Swatch Group), including developments for high-tech products, such as pager watches, watches including integrated sensors such as pressure, compass, altimeter and temperature sensors for Tissot. He was also involved in prototypes developments for watches including GPS and cellular GSM phones.
Since 8 years, he is Professor in Electronics and Signal Processing at the Institute of Microtechnology IMT, University of Neuchâtel, Switzerland. Full professor at EPFL since January 1st, 2009, he works in the field of low-power integrated products for portable devices, including microelectronics for wireless telecommunications, UWB and GNSS systems. He is Head of the Electronics and Signal Processing Laboratory ESPLAB of the EPFL IMT-NE. His laboratory works also for video and audio compression algorithms and their implementation in low power integrated circuits.
Sandro CarraraSandro Carrara is an IEEE Fellow for his outstanding record of accomplishments in the field of design of nanoscale biological CMOS sensors. He is also the recipient of the IEEE Sensors Council Technical Achievement Award in 2016 for his leadership in the emerging area of co-design in Bio/Nano/CMOS interfaces. He is a Professor of the EPFL in Lausanne (Switzerland), and head of the "Bio/CMOS Interfaces" (BCI) research group. He is former professor of optical and electrical biosensors at the Department of Electrical Engineering and Biophysics (DIBE) of the University of Genoa (Italy) and former professor of nanobiotechnology at the University of Bologna (Italy). He holds a PhD in Biochemistry & Biophysics from University of Padua (Italy), a Master degree in Physics from University of Genoa (Italy), and a diploma in Electronics from National Institute of Technology in Albenga (Italy). His scientific interests are on electrical phenomena of nano-bio-structured films, and include CMOS design of biochips based on proteins and DNA. Along his carrier, he published 7 books, one as author with Springer on Bio/CMOS interfaces and, more recently, a Handbook of Bioelectronics with Cambridge University Press. He has more than 250 scientific publications and is author of 13 patents. He is now Editor-in-Chief of the IEEE Sensors Journal, the largest journal among 2019 IEEE publications; he is also founder and Editor-in-Chief of the journal BioNanoScience by Springer, and Associate Editor of IEEE Transactions on Biomedical Circuits and Systems. He is a member of the IEEE Sensors Council and his Executive Committee. He was a member of the Board of Governors (BoG) of the IEEE Circuits And Systems Society (CASS). He has been appointed as IEEE Sensors Council Distinguished Lecturer for the years 2017-2019, and CASS Distinguished Lecturer for the years 2013-2014. His work received several international recognitions: several Top-25 Hottest-Articles (2004, 2005, 2008, 2009, and two times in 2012) published in highly ranked international journals such as Biosensors and Bioelectronics, Sensors and Actuators B, IEEE Sensors journal, and Thin Solid Films; a NATO Advanced Research Award in 1996 for the original contribution to the physics of single-electron conductivity in nano-particles; six Best Paper Awards at the IEEE Sensors Conference 2019 (Montreal) in 2019, Conferences IEEE NGCAS in 2017 (Genoa), MOBIHEALTH in 2016 (Milan), IEEE PRIME in 2015 (Glasgow), in 2010 (Berlin), and in 2009 (Cork); three Best Poster Awards at the EMBEC Conference in 2017 (Tampere, Finland), Nanotera workshop in 2011 (Bern), and NanoEurope Symposium in 2009 (Rapperswil). He also received the Best Referees Award from the journal Biosensor and Bioelectronics in 2006. From 1997 to 2000, he was a member of an international committee at the ELETTRA Synchrotron in Trieste. From 2000 to 2003, he was scientific leader of a National Research Program (PNR) in the filed of Nanobiotechnology. He was an internationally esteemed expert of the evaluation panel of the Academy of Finland in a research program for the years 2010-2013. He has been the General Chairman of the Conference IEEE BioCAS 2014, the premier worldwide international conference in the area of circuits and systems for biomedical applications
Claude PetitpierreClaude Petitpierre has received his diploma of Electrical Engineer in 1972 from EPFL. He spent the next 5 years in the industry, where he participated in the development of realtime cement plant control. He went back to EPFL, obtained the title of Doctor in 1984 and then spent one year (1985-1986) at the AT&T Bell Labs in Holmdel. He was appointed professor in 1987.
He is interested in the theories and techniques that can support the development of complete and reliable software products and in the formal modeling and analysis theories. The work pursued in his laboratory led to the development of a parsimonious superset of Java, supporting concurrency with a concept close to the one provided by formal languages such as CCS or CSP. He is currently devising a development environment that supports the creation of J2EE application in the frame of software engineering.
Claude Petitpierre is also interested in computer aided teaching. He has developed a computer aided programming course that has been used by first year students.
Catherine DehollainShe got the Master Degree in Electrical Engineering in 1982 from EPFL. Then, she worked in Geneva up to 1990 as a Senior Design Engineer in telecommunications at the European research center of Motorola. From 1990 up to 1995, she did her PhD thesis at the Chaire des Circuits et Systemes at EPFL in the domain of impedance broadband matching circuits. Since 1995, she is responsible at EPFL for the RFIC group. She has participated to different Swiss research projects as well as European projects dedicated to data communication of sensors nodes (e.g. MuMoR, Minami European projects) as well as remote powering of sensor nodes. Her main domains of interest are telecom applications (e.g. Impulse radio Ultra-Wide Band, super-regenerative receivers, RFIDs)as well as biomedical applications. She has been the coordinator of European projects (e.g. FP6 SUPREGE, FP7 Ultrasponder)and of Swiss projects (e.g. CAPED CTI project, NEURO-IC SNF project).
Babak FalsafiBabak is a Professor in the School of Computer and Communication Sciences and the founding director of the EcoCloud, an industrial/academic consortium at EPFL investigating scalable data-centric technologies. He has made numerous contributions to computer system design and evaluation including a scalable multiprocessor architecture which was prototyped by Sun Microsystems (now Oracle), snoop filters and memory streaming technologies that are incorporated into IBM BlueGene/P and Q and ARM cores, and computer system performance evaluation methodologies that have been in use by AMD, HP and Google PerKit . He has shown that hardware memory consistency models are neither necessary (in the 90's) nor sufficient (a decade later) to achieve high performance in multiprocessor systems. These results eventually led to fence speculation in modern microprocessors. His latest work on workload-optimized server processors laid the foundation for the first generation of Cavium ARM server CPUs, ThunderX. He is a recipient of an NSF CAREER award, IBM Faculty Partnership Awards, and an Alfred P. Sloan Research Fellowship. He is a fellow of IEEE and ACM.
Mihai Adrian IonescuAdrian M. Ionescu is Full Professor at the Swiss Federal Institute of Technology, Lausanne, Switzerland. He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France and INP Grenoble, France and Stanford University, USA, in 1998 and 1999. Dr. Ionescu has published more than 600 articles in international journals and conferences. He received many Best Paper Awards in international conferences, the Annual Award of the Technical Section of the Romanian Academy of Sciences in 1994 and the Blondel Medal in 2009 for contributions to the progress in engineering sciences in the domain of electronics. He is the 2013 recipient of the IBM Faculty Award in Engineering. He served the IEDM and VLSI conference technical committees and was the Technical Program Committee (Co)Chair of ESSDERC in 2006 and 2013. He is a member of the SATW. He is director of the Laboratory of Micro/Nanoelectronic Devices (NANOLAB).
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
