Concept
Karnaugh map
Related publications (31)
DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis
A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence o ...
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022Three-Input Gates for Logic Synthesis
Giovanni De Micheli, Mathias Soeken, Dewmini Sudara Marakkalage, Eleonora Testa, Heinz Riener
Most logic synthesis algorithms work on graph representations of logic functions with nodes associated with arbitrary logic expressions or simple logic functions and iteratively optimize such graphs. While recent multilevel logic synthesis efforts focused ...
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021