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Instruction-cache misses account for up to 40%; of execution time in online transaction processing (OLTP) database workloads. In contrast to data cache misses, instruction misses cannot be overlapped with out-of-order execution. Chip design limitations do ...
Runtime monitoring tools are invaluable for detecting various types of bugs, in both sequential and multi-threaded programs. However, these tools often slow down the monitored program by an order of magnitude or more [4], implying that the tools are ill-su ...
The Visible Human Slice Server (http://visiblehuman.epfl.ch) started offering its slicing services at the end of June 1998. From that date until the end of May, more than 280'000 slices were extracted from the Visible Man, by laymen interested in anatomy, ...
Society of Photo-Optical Instrumentation Engineers, Bellingham, WA, USA2000
Prior research shows that database system performance is dominated by off-chip data stalls, resulting in a concerted effort to bring data into on-chip caches. At the same time, high levels of integration have enabled the advent of chip multiprocessors and ...
In recent years, the semiconductor industry has turned its focus towards heterogeneous multi-processor platforms. They are an economically viable solution for coping with the growing setup and manufacturing cost of silicon systems. Furthermore, their inher ...
Real-time simulation of thread and knot-tying with visual and force feedback is an essential part of virtual reality laparoscopic training. This paper presents a physics-based thread simulator that enables realistic knot tying at haptic rendering rate. The ...
Using register renaming and physical registers, modern microprocessors eliminate false data dependences from reuse of the instruction set defined registers (logical registers). High performance processors that have longer pipelines and a greater capacity t ...
We present a framework for distributed combinatorial optimization. The framework is implemented in Java, and simulates a multiagent environment in a single Java virtual machine. Each agent in the environment is executed asynchronously in a separate executi ...
Applications vary in the degree of instruction level parallelism (ILP) available to be exploited by a superscalar processor. The ILP can also vary significantly within an application. On one end of the microarchitecture space are monolithic superscalar des ...
Herein is reported an investigation towards the stereoselective synthesis of inherently chiral pseudorotaxanes. Chiral ammonium threads were readily prepared in five steps from racemic or enantiopure (M or P) salts of di-n-propyl-1,13-dimethoxyquinacridini ...
