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Related publications (83)

Polarity-Controllable Silicon Nanowire Transistors with Dual Threshold Voltages

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang, Michele De Marchi

Gate-all-around (GAA) silicon nanowires enable an unprecedented electrostatic control on the semiconductor channel that can push device performance with continuous scaling. In modern electronic circuits, the control of the threshold voltage is essential fo ...

Institute of Electrical and Electronics Engineers2014

Non-LUT field-programmable gate arrays

Paolo Ienne, Grace Zgheib, David Novo Bruna, Hadi Parandeh Afshar

New logic blocks capable of replacing the use of Look-Up Tables (LUTs) in integrated circuits, such as Field-Programmable Gate Arrays (FPGAs), are disclosed herein. In one embodiment, the new logic block is a tree structure comprised of a number of levels ...

2014

Vertically Stacked Double Gate Nanowires FETs with Controllable Polarity: From Devices to Regular ASICs

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Shashi Kanth Bobba, Michele De Marchi

Vertically stacked nanowire FETs (NWFETs) with gate-all-around structure are the natural and most advanced extension of FinFETs. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., the device shows n- and p-type characteristics sim ...

2013

Gate-all-around buckled dual Si nanowire nMOSFETs on bulk Si for transport enhancement and digital logic

Mihai Adrian Ionescu, Didier Bouvet, Mohammad Najmzadeh

In this paper, we report formation of GAA buckled dual Si nanowire MOSFETs including two sub-80 nm Si cores on bulk Si using 0.8 mu m optical lithography and local oxidation for the first time. 0.833 GPa uniaxial tensile stress is measured in the buckled s ...

Elsevier Science Bv2013

Vertically-Stacked Silicon Nanowire Transistors with Controllable Polarity: a Robustness Study

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Hassan Ghasemzadeh Mohammadi

Vertically-stacked Silicon NanoWire FETs (SiN- WFETs) with gate-all-around control are the natural and most advanced extension of FinFETs. At advanced technology nodes, due to Schottky contacts at channel interfaces, devices show an ambipolar behavior, i.e ...

2013

Efficient Arithmetic Logic Gates Using Double-Gate Silicon Nanowire FETs, invited paper

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

Silicon NanoWire (SiNW) based Field Effect Tran- sistors (FETs) are promising candidates to extend Moore’s law in the coming years. Recently, Double-Gate (DG) SiNWFETs have been demonstrated to allow on-line configurability of n -type and p -type device po ...

2013

Ultra low power NEMFET based logic

Mihai Adrian Ionescu, Antonios Bazigos, Surya Shankar Dan

In this paper, we introduce a Nano-Electro-Mechanical Field Effect Transistor (NEMFET) based logic family tailored to the implementation of low speed and ultra low energy functional units and processors. Basic Boolean gates implemented with NEMFETs only ar ...

IEEE2013

FinFET integrated low-power circuits for enhanced sensing applications

Mihai Adrian Ionescu, Antonios Bazigos, Alexandru Rusu, Sara Rigante, Paolo Livi

This work presents different circuit architectures that combine sensing and signal readout functions. The basic building block is a Fin Field-Effect Transistor (Fin-FET) used as both sensor and metal gate transistor. Moreover, a hybrid partially gated FinF ...

Elsevier2013

Ambipolar silicon nanowire field effect transistor

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Michele De Marchi

This invention describes a novel electronic device consisting of one-or more-vertically stacked gate-all-around silicon nanowire field effect transistor (SNWFET) with two independent gate electrodes. One of the two gate electrodes, acting on the central se ...

2013

Physical Synthesis onto Sea-of-Tiles with Double-Gate Silicon Nanowire Transistors

Giovanni De Micheli, Yusuf Leblebici, Shashi Kanth Bobba, Michele De Marchi

We have designed and fabricated double-gate ambipolar field-effect transistors, which exhibit p-type and n-type characteristics by controlling the polarity of the second gate. In this work, we present an approach for designing an efficient regular layout, ...

Ieee2012

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