Concept
High-level synthesis
Related publications (323)
Contemporary Logic Synthesis: with an Application to AQFP Circuit Optimization
Electronic devices play an irreplaceable role in our lives. With the tightening time to market, exploding demand for computing power, and continuous desire for smaller, faster, less energy-consuming, and lower-cost chips, computer-aided design for electron ...
EPFL2024Technology-Aware Logic Synthesis for Superconducting Electronics
Giovanni De Micheli, Alessandro Tempia Calvino, Dewmini Sudara Marakkalage, Mingfei Yu, Siang-Yun Lee, Rassul Bairamkulov
Superconducting electronics provide us with cryogenic digital circuits that can rival established technologies in performance and energy consumption. Today, the lack of tools for the design of large-scale integrated superconducting circuits is a major obst ...
2024Algebraic and Boolean Methods for SFQ Superconducting Circuits
Giovanni De Micheli, Alessandro Tempia Calvino
Rapid single-flux quantum (RSFQ) is one of the most advanced and promising superconducting logic families, offering exceptional energy efficiency and speed. RSFQ technology requires delay registers (DFFs) and splitter cells to satisfy the path-balancing an ...
2024Resource Sharing in Dataflow Circuits
Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Axel Marmet
To achieve resource-efficient hardware designs, high-level synthesis (HLS) tools share (i.e., time-multiplex) functional units among operations of the same type. This optimization is typically performed in conjunction with operation scheduling to ensure th ...
New York2023An Iterative Method for Mapping-Aware Frequency Regulation in Dataflow Circuits
Andrea Guerrieri, Lana Josipovic, Carmine Rizzi
Dataflow circuits promise to overcome the scheduling limitations of standard HLS solutions. However, their performance suffers due to timing overheads caused by their handshake communication protocol. Current pipelining solutions fail to account for logic ...
New York2023Technology Mapping Using Multi-output Library Cells
Giovanni De Micheli, Alessandro Tempia Calvino
Technology mapping transforms a technology-independent representation into a technology-dependent one given a library of cells. Even if technology libraries contain multi-output cells, state-of-the-art techniques fully exploit single-output cells only. Mul ...
2023ROSMOSE: A Web-based Optimization Tool to Aid Decision-making for the Design and Operation of Industrial and Urban Energy Systems
François Maréchal, Daniel Alexander Florez Orrego, Meire Ellen Gorete Ribeiro Domingos, Cédric Terrier, Michel Lopez
Energy efficiency is crucial for the sustainable operation of all industrial and urban sectors. However, practicing engineers have seldom access to open-source tools that can readily evaluate and compare scenarios in terms of energy consumption, cost, and ...
2023An Error-Based Approximation Sensing Circuit for Event-Triggered Low-Power Wearable Sensors
David Atienza Alonso, Alexandre Sébastien Julien Levisse, Tomas Teijeiro Campo, Silvio Zanoli, Flavio Ponzina
Event-based sensors have the potential to optimize energy consumption at every stage in the signal processing pipeline, including data acquisition, transmission, processing, and storage. However, almost all state-of-the-art systems are still built upon th ...
2023Artificial Neural Network Training on an Optical Processor via Direct Feedback Alignment
Florent Gérard Krzakala, Julien Marcel Daniel Emmanuel Launay
Artificial Neural Networks (ANN) are habitually trained via the back-propagation (BP) algorithm. This approach has been extremely successful: Current models like GPT-3 have O(10 11 ) parameters, are trained on O(10 11 ) words and produce awe-inspiring resu ...
IEEE2023Unleashing Parallelism in Elastic Circuits with Faster Token Delivery
Paolo Ienne, Andrea Guerrieri, Lana Josipovic, Ayatallah Ahmed Gamal Kamal Elakhras
High-level synthesis (HLS) is the process of automatically generating circuits out of high-level language descriptions. Previous research has shown that dynamically scheduled HLS through elastic circuit generation is successful at exploiting parallelism in ...
IEEE COMPUTER SOC2022