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Motorola 68000

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Motorola 68000

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Design and Testing Strategies for Modular 3-D-Multiprocessor Systems Using Die-Level Through Silicon Via Technology

3D Integration Technology for Lab-on-a-Chip Applications

A CMOS Compatible Chip-to-Chip 3D Integration Platform

Bringing Virtualization to the x86 Architecture with the Original VMware Workstation

Controlled Multi-Wavelength Emission in Full CMOS Compatible Micro-Lasers for on Chip Interconnections

Ultra Low Power Multi-Operand Adder Architecture for Subthreshold Circuits

Power/Performance Exploration of Single-core and Multi-core Processor Approaches for Biomedical Signal Processing

Simulation of High-Performance Memory Allocators

Competitive ratio of List Scheduling on uniform machines and randomized heuristics

Ambipolar silicon nanowire FETs with stenciled sub-µm metal gate