Related publications (23)

How to Achieve Large-Area Ultra-Fast Operation of MoS 2 Monolayer Flash Memories?

Aleksandra Radenovic, Andras Kis, Mukesh Kumar Tripathi, Zhenyu Wang, Asmund Kjellegaard Ottesen, Yanfei Zhao, Guilherme Migliato Marega, Hyungoo Ji

Memory devices have returned to the spotlight due to increasing interest in using in-memory computing architectures to make data-driven algorithms more energy-efficient. One of the main advantages of this architecture is the efficient performance of vector ...
2023

AstriFlash: A Flash-Based System for Online Services

Babak Falsafi, Lei Yan, Siddharth Gupta, Mark Johnathon Sutherland, Yunho Oh

Modern datacenters host datasets in DRAM to offer large-scale online services with tight tail-latency requirements. Unfortunately, as DRAM is expensive and increasingly difficult to scale, datacenter operators are forced to consider denser storage technolo ...
2022

Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2

Aleksandra Radenovic, Andras Kis, Mukesh Kumar Tripathi, Zhenyu Wang, Guilherme Migliato Marega

Machine learning and signal processing on the edge are poised to influence our everyday lives with devices that will learn and infer from data generated by smart sensors and other devices for the Internet of Things. The next leap toward ubiquitous electron ...
2022

Perovskite Flash Memory with a Single-Layer Nanofloating Gate

Mohammad Khaja Nazeeruddin, Peng Gao, Hobeom Kim

Here we use triple-cation metal-organic halide perovskite single crystals for the transistor channel of a flash memory device. Moreover, we design and demonstrate a 10 nm thick single-layer nanofloating gate. It consists of a ternary blend of two organic s ...
2020

RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations

Alexandre Sébastien Julien Levisse

As more and more high density memories are required to satisfy the Internet of Things ecosystem, academics and industrials are looking for an intermediate solution to fill the gap between DRAM and Flash NAND in the memory hierarchy. The emergence of Resist ...
2018

RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations

Alexandre Sébastien Julien Levisse

As more and more high density memories are required to satisfy the Internet of Things ecosystem, academics and industrials are looking for an intermediate solution to fill the gap between DRAM and Flash NAND in the memory hierarchy. The emergence of Resist ...
IEEE2018

Design Guidelines for High-Performance SCM Hierarchies

Babak Falsafi, Edouard Bugnion, Alexandros Daglis, Javier Picorel Obando, Mark Johnathon Sutherland, Dionysios Pnevmatikatos, Dmitrii Ustiugov

With emerging storage-class memory (SCM) nearing commercialization, there is evidence that it will deliver the much-anticipated high density and access latencies within only a fewfactors of DRAM. Nevertheless, the latency-sensitive nature of memory-residen ...
ACM2018

Multilevel-Cell Phase-Change Memory: A Viable Technology

Milos Stanisavljevic, Aravinthan Athmanathan, Evangelos Eleftheriou

In order for any non-volatile memory (NVM) to be considered a viable technology, its reliability should be verified at the array level. In particular, properties such as high endurance and at least moderate data retention are considered essential. Phase-ch ...
Ieee-Inst Electrical Electronics Engineers Inc2016

Multilevel-cell phase-change memory

Aravinthan Athmanathan

In the modern digital era of big data applications, there is an ever-increasing demand for higher memory capacity that is both reliable and cost effective. In the domain of non-volatile memory systems, Flash-based storage devices have dominated the consume ...
EPFL2016

Libra: Software-Controlled Cell Bit-Density to Balance Wear in NAND Flash

Paolo Ienne, David Novo Bruna, Xavier Jimenez

Hybrid flash storages combine a small Single-Level Cell (SLC) partition with a large Multilevel Cell (MLC) partition. Compared to MLC-only solutions, the SLC partition exploits fast and short local write updates, while the MLC part brings large capacity. O ...
Assoc Computing Machinery2015

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