Concept

P6 (microarchitecture)

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P6 (microarchitecture)

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Transactions Chasing Scalability and Instruction Locality on Multicores

Wideband generation of pulses in dual-pump optical parametric amplifier: theory and experiment

STREX: Boosting Instruction Cache Reuse in OLTP Workloads Through Stratified Transaction Execution

Quantifying the Mismatch between Emerging Scale-Out Applications and Modern Processors

Performance and Energy Trade-offs Analysis of L2 on-Chip Cache Architectures for Embedded MPSoCs

Montgomery Multiplication on the Cell

Reactive NUCA: Near-Optimal Block Placement and Replication in Distributed Caches

Reliability-Aware Design for Nanometer-Scale Devices, January 2008

Register File Reliability Analysis Through Cycle-Accurate Thermal Emulation

Scheduling threads for constructive cache sharing on CMPs