Concept

P6 (microarchitecture)

Related publications (31)

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VSH, an efficient and provable collision-resistant hash function

Arjen Lenstra

We introduce VSH, very smooth hash, a new S-bit hash function that is provably collision-resistant assuming the hardness of finding nontrivial modular square roots of very smooth numbers modulo an S-bit composite. By very smooth, we mean that the smoothnes ...

Springer Verlag2006

Caching Dynamic Web Content: Designing and Analysing an Aspect-Oriented Solution

Willy Zwaenepoel, Sumit Mittal

Caching dynamic web content is an effective approach to reduce Internet latency and server load. An ideal caching solution is one that can be added transparently by the developers and provides complete consistency of the cached documents, while minimizing ...

2006

Understanding the performance of concurrent error detecting superscalar microarchitectures

Babak Falsafi

Superscalar out-of-order microarchitectures can be modified to support redundant execution of a program as two concurrent threads for soft-error detection. However, the extra workload from redundant execution incurs a performance penalty due to increased c ...

2005

Efficient resource sharing in concurrent error detecting superscalar microarchitectures

Babak Falsafi

Previous proposals for soft-error tolerance have called for redundantly executing a program as two concurrent threads on a superscalar microarchitecture. In a balanced superscalar design, the extra workload from redundant execution induces a severe perform ...

2004

Linear Cryptanalysis of DES

Pascal Junod

The main goal of this diploma work is the implementation of Matsui's linear cryptanalysis of DES and a statistical and theoretical analysis of its complexity and success probability. In order to achieve this goal, we implement first a very fast DES routine ...

2004

Dynamically Matching ILP Characteristics Via a Heterogeneous Clustered Microarchitecture

Lei Chen

Applications vary in the degree of instruction level parallelism (ILP) available to be exploited by a superscalar processor. The ILP can also vary significantly within an application. On one end of the microarchitecture space are monolithic superscalar des ...

2004

Dynamic Frequency and Voltage Control for a Multiple Clock Domain Microarchitecture

Sandhya Dwarkadas

We describe the design, analysis, and performance of an on-line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MCD microarchitecture allows the frequency/voltage of micrprocessor regions to be ...

2002

Walking Four Machines By The Shore

Anastasia Ailamaki

Recent studies have shown that the hardware behavior of database workloads is suboptimal when compared to scientific workloads, and have identified the processor and memory subsystem as the true performance bottlenecks, when running decision-support worklo ...

2001

Reducing set-associative cache energy via way-prediction and selective direct-mapping

Babak Falsafi

Set-associative caches achieve low miss rates for typical applications but result in significant energy dissipation. Set-associative caches minimize access time by probing all the data ways in parallel with the tag lookup, although the output of only the m ...

2001

Linear Cryptanalysis of DES

Pascal Junod

2000