Digital radio | EPFL Graph Search

Digital radio is the use of digital technology to transmit or receive across the radio spectrum. Digital transmission by radio waves includes digital broadcasting, and especially digital audio radio services. In digital broadcasting systems, the analog audio signal is digitized, compressed using an audio coding format such as AAC+ (MDCT) or MP2, and transmitted using a digital modulation scheme. The aim is to increase the number of radio programs in a given spectrum, to improve the audio quality, to eliminate fading problems in mobile environments, to allow additional datacasting services, and to decrease the transmission power or the number of transmitters required to cover a region. However, analog radio (AM and FM) is still more popular and listening to radio over IP (Internet Protocol) is growing in popularity. In 2012 four digital wireless radio systems are recognized by the International Telecommunication Union: the two European systems Digital Audio Broadcasting (DAB) and Digital Radio Mondiale (DRM), the Japanese ISDB-T and the in-band on-channel technique used in the US and Arab world and branded as HD Radio. An older definition, still used in communication engineering literature, is wireless digital transmission technologies, i.e. microwave and radio frequency communication standards where analog information signals as well as digital data are carried by a digital signal, by means of a digital modulation method. This definition includes broadcasting systems such as digital TV and digital radio broadcasting, but also two-way digital radio standards such as the second generation (2G) cell-phones and later, short-range communication such as digital cordless phones, wireless computer networks, digital micro-wave radio links, deep space communication systems such as communications to and from the two Voyager space probes, etc. A less common definition is radio receiver and transmitter implementations that are based on digital signal processing, but may transmit or receive analog radio transmission standards, for example FM radio.

Low-power and low-voltage delta-sigma analog-to-digital converters for digital radio in standard CMOS technology

Nicola Scolari

The transceivers of a wireless sensor network (WSN) have to fulfill the low-power and low-voltage constraints. The WiseNET project has already proven that it is possible to design a receiver working at 1V and consuming less than 2mW. However this transceiver is using OOK and wideband FSK modulations, which have a very poor spectral efficiency. A more complex modulation scheme is therefore needed, which requires an ADC in order to demodulate the signal in the digital domain. The ADC is then becoming the main bottleneck if the low-power consumption is targeted. This thesis aims at studying a next generation WiseNET transceiver using a more spectral efficient phase modulation scheme, particularly the new IEEE 802.15.4 standard, and it focuses on the design of a low-power and low-voltage ADC. The choice of the best receiver architecture depends on many factors, among which the power consumption, the integration suitability, the image rejection, the flicker and quantization noise, etc. Several architectures are analyzed in order to identify the trade-offs and select the most suitable for the IEEE 802.15.4 standard, i.e. a low-IF receiver with a quadrature band-pass ΔΣ modulator. From these considerations, a 2nd-order continuous-time quadrature band-pass ΔΣ modulator was implemented in a 0.18μm standard digital process. The design is focused on the constraints of low power consumption, low supply voltage and low complexity imposed by WSN. The availability of I and Q signals in the low-IF receiver enables a quadrature architecture, which allows to combine signal filtering, image rejection and quantization noise reduction. A continuous-time Gm-C implementation further combines the anti-alias function within the ADC and allows to achieve the 1V operation. The quadrature ΔΣ modulator is clocked at 72MHz and the center frequency is set to 3.75MHz with a bandwidth of 3MHz. The maximum measured signal-to-noise ratio is 36dB and the power consumption is only 450μW under 1V.

EPFL2007

Low-power and low-voltage delta-sigma analog-to-digital converters for digital radio in standard CMOS technology

Nicola Scolari

EPFL2007