Publications related to XNOR gate

Biconditional BDD: A Novel Canonical BDD for Logic Synthesis targeting XOR-rich Functions

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

We present a novel class of decision diagrams, called Biconditional Binary Decision Diagrams (BBDDs), that enable efficient logic synthesis for XOR-rich functions. BBDDs are binary decision diagrams where the Shannon’s expansion is replaced by the bicondit ...

2013

Ambipolar silicon nanowire field effect transistor

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Michele De Marchi

This invention describes a novel electronic device consisting of one-or more-vertically stacked gate-all-around silicon nanowire field effect transistor (SNWFET) with two independent gate electrodes. One of the two gate electrodes, acting on the central se ...

2013

Physical Synthesis onto Sea-of-Tiles with Double-Gate Silicon Nanowire Transistors

Giovanni De Micheli, Yusuf Leblebici, Shashi Kanth Bobba, Michele De Marchi

We have designed and fabricated double-gate ambipolar field-effect transistors, which exhibit p-type and n-type characteristics by controlling the polarity of the second gate. In this work, we present an approach for designing an efficient regular layout, ...

Ieee2012

Ambipolar Gate-Controllable SiNW FETs for Configurable Logic Circuits With Improved Expressive Capability

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici

In this letter, we report on the fabrication and characterization of ambipolar silicon-nanowire (SiNW) field-effect transistors (FETs) with a double-independent-gate (DIG) structure for polarity control. Several structures are fabricated, showing the effec ...

Institute of Electrical and Electronics Engineers2012

Polarity Control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs

Giovanni De Micheli, Davide Sacchetto, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang, Michele De Marchi

We fabricated and characterized ambipolar Silicon Nanowire (SiNW) FET transistors featuring two independent Gate-All-Around (GAA) electrodes and vertically stacked SiNW channels. One of the gate electrodes is exploited to dynamically select the polarity of ...

2012

Convex combination initialization method for kohonen neural network implemented in the CMOS technology

Pierre-André Farine, Rafal Tomasz Dlugosz

The paper presents a new CMOS implementation of the initialization mechanism for Kohonen self-organizing neural networks. A proper selection of initial values of the weights of the neurons exhibits a significant impact on the quality of the learning proces ...

2012

Modeling of Sediment Management for the Lavey Run-of-River HPP in Switzerland

Anton Schleiss, Martin Peter Bieri, Michael Müller

Reservoir sedimentation hinders the operation of the Lavey run-of-river hydropower plant (HPP) on the Rhone River in Switzerland. Deposits upstream of the gated weir and the lateral water intake reduce the flood release capacity and entrain sediments into ...

2012

Low-Noise Microwave Performance of 0.1 mu m Gate AlInN/GaN HEMTs on SiC

Nicolas Grandjean, Jean-François Carlin, Eric Feltin, Marcus Gonschorek

We report the first microwave noise characterization of AlInN/GaN HEMTs. Transistors with a 0.1 mu m gate implemented on a semi-insulating SiC substrate achieve a maximum current density of 1.92 A/mm at V-GS = 0 V, a measured transconductance g(M) = 480 mS ...

2010

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XNOR gate

Biconditional BDD: A Novel Canonical BDD for Logic Synthesis targeting XOR-rich Functions

Ambipolar silicon nanowire field effect transistor

Physical Synthesis onto Sea-of-Tiles with Double-Gate Silicon Nanowire Transistors

Ambipolar Gate-Controllable SiNW FETs for Configurable Logic Circuits With Improved Expressive Capability

Study on dual-lateral-gate suspended-body single-walled carbon nanotube field-effect transistors

Polarity Control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs

Convex combination initialization method for kohonen neural network implemented in the CMOS technology

Modeling of Sediment Management for the Lavey Run-of-River HPP in Switzerland

Generalized Airport Gate Assignment

Low-Noise Microwave Performance of 0.1 mu m Gate AlInN/GaN HEMTs on SiC

Graph Chatbot

Chat with Graph Search

Convex combination initialization method for kohonen neural network implemented in the CMOS technology

Ambipolar Gate-Controllable SiNW FETs for Configurable Logic Circuits With Improved Expressive Capability

Biconditional BDD: A Novel Canonical BDD for Logic Synthesis targeting XOR-rich Functions

Ambipolar silicon nanowire field effect transistor

Physical Synthesis onto Sea-of-Tiles with Double-Gate Silicon Nanowire Transistors

Study on dual-lateral-gate suspended-body single-walled carbon nanotube field-effect transistors

Polarity Control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs

Modeling of Sediment Management for the Lavey Run-of-River HPP in Switzerland

Generalized Airport Gate Assignment

Low-Noise Microwave Performance of 0.1 mu m Gate AlInN/GaN HEMTs on SiC