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Silvermont is a microarchitecture for low-power Atom, Celeron and Pentium branded processors used in systems on a chip (SoCs) made by Intel. Silvermont forms the basis for a total of four SoC families: Merrifield and Moorefield - consumer SoCs intended for smartphones Bay Trail - consumer SoCs aimed at tablets, hybrid devices, netbooks, nettops, and embedded/automotive systems Avoton - SoCs for micro-servers and storage devices Rangeley - SoCs targeting network and communication infrastructure. Silvermont is the successor of the Bonnell, using a newer 22 nm process (previously introduced with Ivy Bridge) and a new microarchitecture, replacing Hyper Threading with out-of-order execution. Silvermont was announced to news media on May 6, 2013, at Intel's headquarters at Santa Clara, California. Intel had repeatedly said the first Bay Trail devices would be available during the Holiday 2013 timeframe, while leaked slides showed that the release window for Bay Trail-T as August 28 – September 13, 2013. Both Avoton and Rangeley were announced as being available in the second half of 2013. The first Merrifield devices were announced in 1H14. According to the Tick–tock model Airmont is the 14 nm die shrink of Silvermont, launched in early 2015 and first seen in the Atom x7-Z8700 as used in the Microsoft Surface 3. Airmont microarchitecture includes the following SoC families: Braswell - consumer SoCs aimed at PCs Cherry Trail - consumer SoCs aimed at tablets. Silvermont based cores have also been used, modified, in the Knight's Landing iteration of Intel's Xeon Phi HPC chips. Silvermont was the first Atom processor to feature an out-of-order architecture. Intel Graphics Technology A 22 nm manufacturing process based on 3D tri-gate transistors System on chip architecture Consumer chips up to quad-core, business-class chips up to eight cores Supports SSE4.2 instruction set Gen 7 Intel HD Graphics with DirectX 11, OpenGL 4.0, and OpenCL 1.1 support. OpenGL 4.0 is supported with 10.18.10.5161 WHQL and later drivers.

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Bonnell (microarchitecture)

Bonnell is a CPU microarchitecture used by Intel Atom processors which can execute up to two instructions per cycle. Like many other x86 microprocessors, it translates x86 instructions (CISC instructions) into simpler internal operations (sometimes referred to as micro-ops, effectively RISC style instructions) prior to execution. The majority of instructions produce one micro-op when translated, with around 4% of instructions used in typical programs producing multiple micro-ops.

Xeon Phi

Xeon Phi was a series of x86 manycore processors designed and made by Intel. It was intended for use in supercomputers, servers, and high-end workstations. Its architecture allowed use of standard programming languages and application programming interfaces (APIs) such as OpenMP. Xeon Phi launched in 2010. Since it was originally based on an earlier GPU design (codenamed "Larrabee") by Intel that was cancelled in 2009, it shared application areas with GPUs.

Goldmont

Goldmont is a microarchitecture for low-power Atom, Celeron and Pentium branded processors used in systems on a chip (SoCs) made by Intel. They allow only one thread per core. The Apollo Lake platform with 14 nm Goldmont core was unveiled at the Intel Developer Forum (IDF) in Shenzhen, China, April 2016. The Goldmont architecture borrows heavily from the Skylake Core processors, so it offers a more than 30 percent performance boost compared to the previous Braswell platform, and it can be used to implement power-efficient low-end devices including Cloudbooks, 2-in-1 netbooks, small PCs, IP cameras, and in-car entertainment systems.

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