Publications related to IEEE 754

A 16-bit Floating-Point Near-SRAM Architecture for Low-power Sparse Matrix-Vector Multiplication

David Atienza Alonso, Giovanni Ansaloni, Grégoire Axel Eggermann, Marco Antonio Rios

State-of-the-art Artificial Intelligence (AI) algorithms, such as graph neural networks and recommendation systems, require floating-point computation of very large matrix multiplications over sparse data. Their execution in resource-constrained scenarios, ...

2023

Overflow-free compute memories for edge AI acceleration

David Atienza Alonso, Giovanni Ansaloni, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Flavio Ponzina

Compute memories are memory arrays augmented with dedicated logic to support arithmetic. They support the efficient execution of data-centric computing patterns, such as those characterizing Artificial Intelligence (AI) algorithms. These architectures can ...

2023

Efficient Lung Nodule Detection via 3D Deep Learning with Shifted Convolutions

Jiancheng Yang, Bo Du, Kang Yuan

The high computational costs of deep convolutional neural networks hinder their deployment in real-world applications, including pulmonary nodule detection from CT scans where large 3D image sizes amplify the issue. This paper presents a novel 3D method to ...

IEEE2023

Optimized Quantization in Distributed Graph Signal Processing

Pascal Frossard, Isabela Cunha Maia Nobre

Distributed graph signal processing methods require that the graph nodes communicate by exchanging messages. These messages have a finite precision in a realistic network, which may necessitate to implement quantization. Quantization, in turn, generates er ...

IEEE2019

Advanced Machine Learning Techniques for Self-Interference Cancellation in Full-Duplex Radios

Andreas Peter Burg, Andreas Toftegaard Kristensen

In-band full-duplex systems allow for more efficient use of temporal and spectral resources by transmitting and receiving information at the same time and on the same frequency. However, this creates a strong self-interference signal at the receiver, makin ...

IEEE2019

Training DNNs with Hybrid Block Floating Point

Babak Falsafi, Martin Jaggi, Tao Lin, Mario Paulo Drumond Lages De Oliveira

The wide adoption of DNNs has given birth to unrelenting computing requirements, forcing datacenter operators to adopt domain-specific accelerators to train them. These accelerators typically employ densely packed full-precision floating-point arithmetic t ...

NEURAL INFORMATION PROCESSING SYSTEMS (NIPS)2018

MATHICSE Technical Report : Fast QR decomposition of HODLR matrices

Daniel Kressner, Ana Susnjara

The efficient and accurate QR decomposition for matrices with hierarchical low-rank structures, such as HODLR and hierarchical matrices, has been challenging. Existing structure-exploiting algorithms are prone to numerical instability as they proceed indi- ...

MATHICSE2018

A Householder-Based Algorithm For Hessenberg-Triangular Reduction

Daniel Kressner, Zvonimir Bujanovic

The QZ algorithm for computing eigenvalues and eigenvectors of a matrix pencil A - lambda B requires that the matrices first be reduced to Hessenberg-triangular (HT) form. The current method of choice for HT reduction relies entirely on Givens rotations re ...

SIAM PUBLICATIONS2018

Training DNNs with Hybrid Block Floating Point

Babak Falsafi, Martin Jaggi, Tao Lin, Mario Paulo Drumond Lages De Oliveira

2018

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