Publications related to Transistor count

Review and Benchmarking of Precision-Scalable Multiply-Accumulate Unit Architectures for Embedded Neural-Network Processing

The current trend for deep learning has come with an enormous computational need for billions of Multiply-Accumulate (MAC) operations per inference. Fortunately, reduced precision has demonstrated large benefits with low impact on accuracy, paving the way ...

2019

More Results on Shortest Linear Programs

Subhadeep Banik

At the FSE conference of ToSC 2018, Kranz et al. presented their results on shortest linear programs for the linear layers of several well known block ciphers in literature. Shortest linear programs are essentially the minimum number of 2-input xor gates r ...

2019

Multi-level high-voltage power supply for dea application

Yves Perriard, Yoan René Cyrille Civet, Morgan Almanza, Lucas Pniak, Lucas Depreux

In order to reap the benefits of Dielectric Elastomer Actuator (DEA) high energy density, the electronics powering the actuator should be as small as possible. Knowing that only a small fraction of the energy delivered to DEAs is effectively converted into ...

2019

On the Dynamic Performance of Laterally Gated Transistors

Elison de Nazareth Matioli, Armin Jafari, Catherine Erine, Giovanni Santoruvo

Laterally gated transistors have been proposed as an innovative device architecture in which a semiconducting channel is controlled by side gates. In this sense, the gate can either be in contact with the sidewalls or be separated by a gap. In the latter c ...

2019

Detection of ultra-low protein concentrations with the simplest possible field effect transistor

Mihai Adrian Ionescu, Elizabeth Buitrago Godinez

Silicon nanowire (Si NW) sensors have attracted great attention due to their ability to provide fast, low-cost, label-free, real-time detection of chemical and biological species. Usually configured as field effect transistors (FETs), they have already dem ...

IOP PUBLISHING LTD2019

Performance Contracts for Software Network Functions

George Candea, Solal Vincenzo Pirelli, Arseniy Zaostrovnykh, Rishabh Ramesh Iyer, Luis David Figueiredo Mascarenhas Moreira Pedrosa

Software network functions (NFs), or middleboxes, promise flexibility and easy deployment of network services but face the serious challenge of unexpected performance behaviour. We propose the notion of a performance contract, a construct formulated in ter ...

USENIX ASSOC2019

A Modular, Direct Time-of-Flight Depth Sensor in 45/65-nm 3-D-Stacked CMOS Technology

Edoardo Charbon, Myung Jae Lee, Preethi Padmanabhan, Augusto Ronchini Ximenes

This article introduces a modular, direct time-of-flight (TOF) depth sensor. Each module is digitally synthesized and features a 2

\times

(8

\times

8) single-photon avalanche diode (SPAD) pixel array, an edge-sensitive decision tree, a shared time-to ...

2019

Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems

Giovanni De Micheli, Giovanni Vincenzo Resta, Pierre-Emmanuel Julien Marc Gaillardon

Here, we review the most recent developments in the field of 2-D electronics. We focus first on the synthesis of 2-D materials, discussing the different growth techniques currently available and assessing their strengths and weaknesses. Moreover, we descri ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

A machine learning approach for power gating the FPGA routing network

Mirjana Stojilovic, Hossein Asadi

Power gating is a common approach for reducing circuit static power consumption. In FPGAs, resources that dominate static power consumption lie in the routing network. Researchers have proposed several heuristics for clustering multiplexers in the routing ...

IEEE COMPUTER SOC2019

A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications

Andreas Peter Burg, Robert Giterman, Cosimo Aprile, Yusuf Leblebici, Andrea Bonetti, Jonathan Emmanuel D Narinx, Nicolas Claude Frigerio

Logic-compatible gain-cell embedded DRAM (GC-eDRAM) is an emerging alternative to conventional SRAM for memory-dominated system-on-chip (SoC) designs due to its high-density, low-power, and two-ported operation. Although GCs have a limited data retention t ...

IEEE2019

Transistor count

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Review and Benchmarking of Precision-Scalable Multiply-Accumulate Unit Architectures for Embedded Neural-Network Processing

More Results on Shortest Linear Programs

Multi-level high-voltage power supply for dea application

On the Dynamic Performance of Laterally Gated Transistors

Detection of ultra-low protein concentrations with the simplest possible field effect transistor

Performance Contracts for Software Network Functions

A Modular, Direct Time-of-Flight Depth Sensor in 45/65-nm 3-D-Stacked CMOS Technology

Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems

A machine learning approach for power gating the FPGA routing network

A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications

More Results on Shortest Linear Programs

Detection of ultra-low protein concentrations with the simplest possible field effect transistor

Multi-level high-voltage power supply for dea application

A machine learning approach for power gating the FPGA routing network

Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems

A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications

Review and Benchmarking of Precision-Scalable Multiply-Accumulate Unit Architectures for Embedded Neural-Network Processing

On the Dynamic Performance of Laterally Gated Transistors

Performance Contracts for Software Network Functions

A Modular, Direct Time-of-Flight Depth Sensor in 45/65-nm 3-D-Stacked CMOS Technology