Von Neumann architecture

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A Shared-Memory Parallel Implementation of the RePlAce Global Cell Placer

Mirjana Stojilovic, Philip Brisk, Frédéric Gessler

RePlAce is a state-of-the-art prototype of a flat, analytic, and nonlinear global cell placement algorithm, which models a placement instance as an electrostatic system with positively charged objects. It can handle large-scale standard-cell and mixed-cell ...

IEEE2020

CoreNEURON : An Optimized Compute Engine for the NEURON Simulator

James Gonzalo King, Felix Schürmann, Michael Lee Hines, Fabien Jonathan Delalondre, Aleksandr Ovcharenko, Pramod Shivaji Kumbhar, Jérémy Pierre Benoit Fouriaux

The NEURON simulator has been developed over the past three decades and is widely used by neuroscientists to model the electrical activity of neuronal networks. Large network simulation projects using NEURON have supercomputer allocations that individually ...

2019

Speculative Dataflow Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic

With FPGAs facing broader application domains, the conversion of imperative languages into dataflow circuits has been recently revamped as a way to overcome the conservatism of statically scheduled high-level synthesis. Apart from the ability to extract pa ...

ASSOC COMPUTING MACHINERY2019

Wearable Sensors for Frequency-Multiplexed EIT and Multilead ECG Data Acquisition

Josias Basil Wacker, Fabian Braun, Michaël Rapin

This paper presents a wearable sensor architecture for frequency-multiplexed electrical impedance tomography (EIT) and synchronous multilead electrocardiogram (ECG) data acquisition. The system is based on a novel electronic sensing architecture, called co ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2019

Analog Control of Retainable Resistance Multistates in HfO2 Resistive-Switching Random Access Memories (ReRAMs)

Elmira Shahrabi, Yusuf Leblebici, Jury Sandrini, Carlo Ricciardi, Cecilia Giovinazzo, Oguz Tolga Celik

Resistive-switching random access memory (ReRAM) technologies are nowadays a good candidate to overcome the bottleneck of Von Neumann architectures, taking advantage of their logic-in-memory capability and the ability to mimic biological synapse behavior. ...

AMER CHEMICAL SOC2019

Cost for a controlled linear KdV equation

Joachim Krieger, Shengquan Xiang

The controllability of the linearized KdV equation with right Neumann control is studied in the pioneering work of Rosier [25]. However, the proof is by contradiction arguments and the value of the observability constant remains unknown, though rich mathem ...

2019

A Fast, Reliable and Wide-voltage-range In-memory Computing Architecture

David Atienza Alonso, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse, William Andrew Simon

In-Memory Computing (IMC) solutions, and particularly bitline computing in SRAM, appear promising as they mitigate one of the most energy consuming aspects in computation: data movement. In this work we propose a fast (2.4Ghz for bitwise operations and 2.4 ...

Association for Computing Machinery2019

Distributed modifier-adaptation schemes for the real-time optimisation of uncertain interconnected systems

Dominique Bonvin, René Uwe Schneider, Predrag Milosavljevic

This paper proposes a set of distributed real-time optimisation schemes for the steady-state optimisation of parametrically and structurally uncertain systems that are composed of multiple interconnected subsystems. These schemes are derived in the framewo ...

TAYLOR & FRANCIS LTD2019

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