Concept

Slew rate

Related publications (9)

Pushing the Limits of Efficiency and Power Density in High-Frequency Power Conversion Based on Wide-Band-Gap Technologies

The emergence of wide-band-gap (WBG) power transistors with low conduction losses and high-speed switching speeds has paved the way for more-than-ever efficient power electronics systems and huge energy saving potentials. Likewise, power density- the ratio ...

EPFL2021

Analysis of Large-Signal Output Capacitance of Transistors using Sawyer–Tower Circuit

Elison de Nazareth Matioli, Remco Franciscus Peter van Erp, Armin Jafari, Palliyage Srilak Nirmana Perera, Georgios Kampitsis, Jessy Anthony Ançay

A detailed analysis on the Sawyer–Tower method used in the measurement of large-signal output capacitance (Co) of power transistors is presented, followed by important design recommendations to obtain accurate results. Key factors affecting the proper impl ...

2020

Peta-pico-Voltron: An open-source high voltage power supply

Samuel Rosset, Samuel Schlatter

We present the design (hardware + software) of “Peta-pico-Voltron”, a low-current high voltage power supply for electrostatic actuators. Developed primarily for dielectric elastomer actuators, it offers a low-cost solution to generate user controllable vol ...

2018

Three-level stencil alignment fabrication of a high-k gate stack organic thin film transistor

Jürgen Brugger, Mihai Adrian Ionescu, Andreea Veronica Savu, Dimitrios Tsamados, Katrin Sidler Arnet, Nenad Cvetkovic

In this work a high-k double-gate pentacene field-effect transistor architecture is presented. The devices are fabricated on a flexible polyimide substrate by three aligned levels of stencil lithography combined with standard photolithography. ALD-deposite ...

Elsevier2011

Clock Distribution Networks in 3-D Integrated Systems

Vasileios Pavlidis

3-D integration is an important technology that addresses fundamental limitations in on-chip interconnects. Several design issues related to 3-D circuits, such as multiplane synchronization, however, need to be addressed. A comparison of three 3-D clock di ...

2011

A Power-Efficient LVDS Driver Circuit in 0.18-um CMOS Technology

Seyed Armin Tajalli, Yusuf Leblebici

This article presents a power-efficient and low-voltage CMOS output driver circuit based on low-voltage differential signaling (LVDS) standard. To reduce the ringing at the output of the proposed driver circuit and simultaneously keep the power consumption ...

IEEE Service Center2007

A standard CMOS multi-channel single-chip receiver for multi-gigabit optical data communications

Paul Victor Georges Muller

As dictated by ongoing technology scaling and the advent of multi-core systems, each new generation of microprocessors and digital signal processors provides higher computing power and data throughput. However, the available bandwidth of the input/output ( ...

EPFL2006

Limiting Amplifiers for Next-Generation Multi-Channel Optical I/O Interfaces in SoCs

Yusuf Leblebici, Paul Victor Georges Muller

We present two fully differential limiting amplifiers with and without inductive peaking, designed and integrated in 0.18mm digital CMOS technology. The key design trade-offs, the importance of inductive coupling between neighboring channels, as well as th ...

2005

A Low Noise Amplifier with Automatic Gain Control and Anticlipping Control in CMOS Technology

Christian Enz, François Krummenacher

A CMOS low-noise amplifier (LNA) with two variable gain ranges of 6 and 9 dB is presented. Variable gain is realized by using linearized MOS resistive circuits (MRCs) as voltage-controlled resistors. One of these resistors is located in the feedback loop o ...

1992

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