Publications related to Path dependence

Edge states control droplet breakup in subcritical extensional flows

François Gallaire, Tobias Schneider, Giacomo Gallino

A fluid droplet suspended in an extensional flow of moderate intensity may break into pieces, depending on the amplitude of the initial droplet deformation. In subcritical uniaxial extensional flow the nonbreaking base state is linearly stable, implying th ...

2018

Closing the Performance Gap Between Volatile and Persistent Key-Value Stores Using Cross-Referencing Logs

Matej Pavlovic

Key-Value (K-V) stores are an integral building block in modern datacenter applications. With byteaddressable persistent memory (PM) technologies, such as Intel/Micron's 3D XPoint, on the horizon, there has been an influx of new high performance K-V stores ...

USENIX ASSOC2018

Combining Structural and Timing Errors in Overclocked Inexact Speculative Adders

Christian Enz, Vincent Frédéric Camus, Mattia Cacciotti, Yu Jiang, Xun Jiao

Worst-case design is used in IoT devices and high performance data centers to ensure reliability, leading to a power efficiency loss. Recently, approximate computing has been proposed to trade off accuracy for efficiency. In this paper, we use Inexact Spec ...

Ieee2017

Exploiting Large Image Sets for Road Scene Parsing

Mathieu Salzmann

There is an increasing interest in exploiting multiple images for scene understanding, with great progress in areas such as cosegmentation and video segmentation. Jointly analyzing the images in a large set offers the opportunity to exploit a greater sourc ...

Ieee-Inst Electrical Electronics Engineers Inc2016

A Low-power Carry Cut-Back Approximate Adder with Fixed-point Implementation and Floating-point Precision

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter

This paper introduces an approximate adder architecture based on a digital quasi-feedback technique called Carry Cut-Back in which high-significance stages can cut the carry propagation chain at lower-significance positions. This lightweight approach preve ...

Ieee2016

Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment

Andreas Peter Burg, Georgios Karakonstantis, Jeremy Hugues-Felix Constantin, Anupam Chattopadhyay

Static timing analysis provides the basis for setting the clock period of a microprocessor core, based on its worst-case critical path. However, depending on the design, this critical path is not always excited and therefore dynamic timing margins exist th ...

2015

Leveraging Hardware Message Passing for Efficient Thread Synchronization

André Schiper, Thomas Ropars, Darko Petrovic

As the level of parallelism in manycore processors keeps increasing, providing efficient mechanisms for thread synchronization in concurrent programs is becoming a major concern. On cache-coherent shared-memory processors, synchronization efficiency is ult ...

2014

Leveraging Hardware Message Passing for Efficient Thread Synchronization

André Schiper, Thomas Ropars, Darko Petrovic

As the level of parallelism in manycore processors keeps increasing, providing efficient mechanisms for thread synchronization in concurrent programs is becoming a major concern. On cache-coherent shared-memory processors, synchronization efficiency is ult ...

Assoc Computing Machinery2014

ATraPos: Adaptive Transaction Processing on Hardware Islands

Anastasia Ailamaki, Pinar Tözün, Danica Porobic, Erietta Liarou

Nowadays, high-performance transaction processing applications increasingly run on multisocket multicore servers. Such architectures exhibit non-uniform memory access latency as well as non-uniform thread communication costs. Unfortunately, traditional sha ...

2014

Challenges in Algorithmic Mechanism Design

Paul David Dütting

This thesis addresses three challenges in algorithmic mechanism design, which seeks to devise computationally efficient mechanisms consisting of an outcome rule and a payment rule that implement desirable outcomes in strategic equilibrium. The first challe ...

EPFL2013

Path dependence

Edge states control droplet breakup in subcritical extensional flows

Closing the Performance Gap Between Volatile and Persistent Key-Value Stores Using Cross-Referencing Logs

Combining Structural and Timing Errors in Overclocked Inexact Speculative Adders

Exploiting Large Image Sets for Road Scene Parsing

A Low-power Carry Cut-Back Approximate Adder with Fixed-point Implementation and Floating-point Precision

Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment

Leveraging Hardware Message Passing for Efficient Thread Synchronization

Leveraging Hardware Message Passing for Efficient Thread Synchronization

ATraPos: Adaptive Transaction Processing on Hardware Islands

Challenges in Algorithmic Mechanism Design

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Exploiting Dynamic Timing Margins in Microprocessors for Frequency-Over-Scaling with Instruction-Based Clock Adjustment

A Low-power Carry Cut-Back Approximate Adder with Fixed-point Implementation and Floating-point Precision

ATraPos: Adaptive Transaction Processing on Hardware Islands

Edge states control droplet breakup in subcritical extensional flows

Exploiting Large Image Sets for Road Scene Parsing

Leveraging Hardware Message Passing for Efficient Thread Synchronization

Combining Structural and Timing Errors in Overclocked Inexact Speculative Adders

Leveraging Hardware Message Passing for Efficient Thread Synchronization

Challenges in Algorithmic Mechanism Design

Closing the Performance Gap Between Volatile and Persistent Key-Value Stores Using Cross-Referencing Logs